#Build: Synplify Pro (R) N-2018.03L-SP1-1, Build 443R, Apr 1 2019 #install: C:\lscc\diamond\3.11_x64\synpbase #OS: Windows 8 6.2 #Hostname: COMPUTERYT # Mon Feb 15 12:42:39 2021 #Implementation: impl1 Copyright (C) 1994-2018 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: N-2018.03L-SP1-1 Install: C:\lscc\diamond\3.11_x64\synpbase OS: Windows 6.2 Hostname: COMPUTERYT Implementation : impl1 Synopsys HDL Compiler, Version comp2018q2p1, Build 461R, Built Apr 1 2019 09:17:43 @N: : | Running in 64-bit mode Copyright (C) 1994-2018 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: N-2018.03L-SP1-1 Install: C:\lscc\diamond\3.11_x64\synpbase OS: Windows 6.2 Hostname: COMPUTERYT Implementation : impl1 Synopsys Verilog Compiler, Version comp2018q2p1, Build 461R, Built Apr 1 2019 09:17:43 @N: : | Running in 64-bit mode @I::"C:\lscc\diamond\3.11_x64\synpbase\lib\lucent\machxo2.v" (library work) @I::"C:\lscc\diamond\3.11_x64\synpbase\lib\lucent\pmi_def.v" (library work) @I::"C:\lscc\diamond\3.11_x64\synpbase\lib\vlog\hypermods.v" (library __hyper__lib__) @I::"C:\lscc\diamond\3.11_x64\synpbase\lib\vlog\umr_capim.v" (library snps_haps) @I::"C:\lscc\diamond\3.11_x64\synpbase\lib\vlog\scemi_objects.v" (library snps_haps) @I::"C:\lscc\diamond\3.11_x64\synpbase\lib\vlog\scemi_pipes.svh" (library snps_haps) @I::"C:\Users\CROFY\Documents\Diamond\Project\step_project01\impl1\source\OLED12832.v" (library work) @I::"C:\Users\CROFY\Documents\Diamond\Project\step_project01\impl1\source\DS18B20Z.v" (library work) @I::"C:\Users\CROFY\Documents\Diamond\Project\step_project01\impl1\source\bin_to_bcd.v" (library work) @I::"C:\Users\CROFY\Documents\Diamond\Project\step_project01\control_module.v" (library work) @I::"C:\Users\CROFY\Documents\Diamond\Project\step_project01\step_project01.v" (library work) @W:CG1249 : step_project01.v(84) | Redeclaration of implicit signal time_oled @W:CG1249 : step_project01.v(85) | Redeclaration of implicit signal temp_oled @I::"C:\Users\CROFY\Documents\Diamond\Project\step_project01\impl1\source\Uart_Tx.v" (library work) @I::"C:\Users\CROFY\Documents\Diamond\Project\step_project01\impl1\source\Uart_Rx.v" (library work) @I::"C:\Users\CROFY\Documents\Diamond\Project\step_project01\impl1\source\Baud.v" (library work) @I::"C:\Users\CROFY\Documents\Diamond\Project\step_project01\impl1\source\Uart_Bus.v" (library work) Verilog syntax check successful! Selecting top level module step_project01 @N:CG364 : DS18B20Z.v(18) | Synthesizing module DS18B20Z in library work. Running optimization stage 1 on DS18B20Z ....... @A:CL282 : DS18B20Z.v(61) | Feedback mux created for signal temperature_buffer[7:0]. It is possible a set/reset assignment for this is signal missing. To improve timing and area, specify a set/reset value. @A:CL282 : DS18B20Z.v(61) | Feedback mux created for signal num_delay[19:0]. It is possible a set/reset assignment for this is signal missing. To improve timing and area, specify a set/reset value. @A:CL282 : DS18B20Z.v(61) | Feedback mux created for signal data_wr_buffer[7:0]. It is possible a set/reset assignment for this is signal missing. To improve timing and area, specify a set/reset value. @A:CL282 : DS18B20Z.v(61) | Feedback mux created for signal data_wr[7:0]. It is possible a set/reset assignment for this is signal missing. To improve timing and area, specify a set/reset value. @A:CL282 : DS18B20Z.v(61) | Feedback mux created for signal data_out[15:0]. It is possible a set/reset assignment for this is signal missing. To improve timing and area, specify a set/reset value. @N:CL189 : DS18B20Z.v(61) | Register bit data_wr[0] is always 0. @N:CL189 : DS18B20Z.v(61) | Register bit data_wr[2] is always 1. @N:CL189 : DS18B20Z.v(61) | Register bit num_delay[9] is always 0. @N:CL189 : DS18B20Z.v(61) | Register bit num_delay[10] is always 0. @N:CL189 : DS18B20Z.v(61) | Register bit num_delay[11] is always 0. @N:CL189 : DS18B20Z.v(61) | Register bit num_delay[15] is always 0. @N:CL189 : DS18B20Z.v(61) | Register bit num_delay[18] is always 0. @W:CL260 : DS18B20Z.v(61) | Pruning register bit 18 of num_delay[19:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : DS18B20Z.v(61) | Pruning register bit 15 of num_delay[19:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : DS18B20Z.v(61) | Pruning register bits 11 to 9 of num_delay[19:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : DS18B20Z.v(61) | Pruning register bit 2 of data_wr[7:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : DS18B20Z.v(61) | Pruning register bit 0 of data_wr[7:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @N:CG364 : bin_to_bcd.v(18) | Synthesizing module bin_to_bcd in library work. Running optimization stage 1 on bin_to_bcd ....... @N:CG364 : OLED12832.v(18) | Synthesizing module OLED12832 in library work. Running optimization stage 1 on OLED12832 ....... @W:CL265 : OLED12832.v(47) | Removing unused bit 167 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 159 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 151 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 143 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 135 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 127 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 119 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 111 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 103 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 95 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 87 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 79 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 71 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 63 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 55 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 47 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 39 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 31 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 23 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 15 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL265 : OLED12832.v(47) | Removing unused bit 7 of char[167:0]. Either assign all bits or reduce the width of the signal. @W:CL190 : OLED12832.v(47) | Optimizing register bit x_ph[3] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit x_ph[5] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit x_ph[6] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit x_ph[7] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit x_pl[0] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit x_pl[1] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit x_pl[2] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit x_pl[3] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit x_pl[4] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit x_pl[5] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit x_pl[6] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit x_pl[7] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit y_p[2] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit y_p[3] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit y_p[6] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[16] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[22] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[40] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[41] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[42] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[43] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[44] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[46] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[48] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[49] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[50] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[51] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[52] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[54] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[56] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[57] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[58] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[59] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[60] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[62] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[64] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[65] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[66] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[67] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[68] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[70] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[72] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[73] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[74] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[75] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[76] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[78] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[80] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[81] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[82] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[83] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[84] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[86] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[88] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[89] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[90] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[91] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[92] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[94] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[97] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[99] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[105] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[108] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[113] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[116] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[120] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[121] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[123] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[128] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[129] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[130] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[131] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[132] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[133] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[134] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[136] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[137] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[138] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[139] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[140] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[141] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[142] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[144] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[145] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[146] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[147] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[148] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[149] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[150] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[152] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[153] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[154] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[155] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[156] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[157] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[158] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[160] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[161] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[162] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. @W:CL190 : OLED12832.v(47) | Optimizing register bit char[163] to a constant 0. To keep the instance, apply constraint syn_preserve=1 on the instance. Only the first 100 messages of id 'CL190' are reported. To see all messages use 'report_messages -log C:\Users\CROFY\Documents\Diamond\Project\step_project01\impl1\synlog\step_project01_impl1_compiler.srr -id CL190' in the Tcl shell. To see all messages in future runs, use the command 'message_override -limit {CL190} -count unlimited' in the Tcl shell. @N:CL189 : OLED12832.v(162) | Register bit cmd[0][0] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[0][1] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[0][2] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[0][3] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[0][4] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[0][5] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[0][6] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[0][7] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[1][0] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[1][1] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[1][2] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[1][3] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[1][4] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[1][5] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[1][6] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[1][7] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[2][0] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[2][1] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[2][2] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[2][3] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[2][4] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[2][5] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[2][6] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[2][7] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[3][0] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[3][1] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[3][2] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[3][3] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[3][4] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[3][5] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[3][6] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[3][7] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[4][0] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[4][1] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[4][2] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[4][3] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[4][4] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[4][5] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[4][6] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[4][7] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[5][0] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[5][1] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[5][2] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[5][3] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[5][4] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[5][5] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[5][6] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[5][7] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[6][0] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[6][1] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[6][2] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[6][3] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[6][4] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[6][5] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[6][6] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[6][7] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[7][0] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[7][1] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[7][2] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[7][3] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[7][4] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[7][5] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[7][6] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[7][7] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[8][0] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[8][1] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[8][2] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[8][3] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[8][4] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[8][5] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[8][6] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[8][7] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[9][0] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[9][1] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[9][2] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[9][3] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[9][4] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[9][5] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[9][6] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[9][7] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[10][0] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[10][1] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[10][2] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[10][3] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[10][4] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[10][5] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[10][6] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[10][7] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[11][0] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[11][1] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[11][2] is always 0. @N:CL189 : OLED12832.v(162) | Register bit cmd[11][3] is always 1. @N:CL189 : OLED12832.v(162) | Register bit cmd[11][4] is always 0. Only the first 100 messages of id 'CL189' are reported. To see all messages use 'report_messages -log C:\Users\CROFY\Documents\Diamond\Project\step_project01\impl1\synlog\step_project01_impl1_compiler.srr -id CL189' in the Tcl shell. To see all messages in future runs, use the command 'message_override -limit {CL189} -count unlimited' in the Tcl shell. @W:CL260 : OLED12832.v(47) | Pruning register bit 22 of char[22:16]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 16 of char[22:16]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 46 of char[46:40]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : OLED12832.v(47) | Pruning register bits 44 to 40 of char[46:40]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 54 of char[54:48]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : OLED12832.v(47) | Pruning register bits 52 to 48 of char[54:48]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 62 of char[62:56]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : OLED12832.v(47) | Pruning register bits 60 to 56 of char[62:56]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 70 of char[70:64]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : OLED12832.v(47) | Pruning register bits 68 to 64 of char[70:64]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 78 of char[78:72]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : OLED12832.v(47) | Pruning register bits 76 to 72 of char[78:72]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 86 of char[86:80]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : OLED12832.v(47) | Pruning register bits 84 to 80 of char[86:80]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 94 of char[94:88]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : OLED12832.v(47) | Pruning register bits 92 to 88 of char[94:88]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 99 of char[102:96]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 97 of char[102:96]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 108 of char[110:104]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 105 of char[110:104]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 116 of char[118:112]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 113 of char[118:112]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 123 of char[126:120]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : OLED12832.v(47) | Pruning register bits 121 to 120 of char[126:120]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL169 : OLED12832.v(47) | Pruning unused register char[134:128]. Make sure that there are no unused intermediate registers. @W:CL169 : OLED12832.v(47) | Pruning unused register char[142:136]. Make sure that there are no unused intermediate registers. @W:CL169 : OLED12832.v(47) | Pruning unused register char[150:144]. Make sure that there are no unused intermediate registers. @W:CL169 : OLED12832.v(47) | Pruning unused register char[158:152]. Make sure that there are no unused intermediate registers. @W:CL169 : OLED12832.v(47) | Pruning unused register char[166:160]. Make sure that there are no unused intermediate registers. @W:CL279 : OLED12832.v(47) | Pruning register bits 7 to 5 of x_ph[7:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 3 of x_ph[7:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 6 of y_p[7:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : OLED12832.v(47) | Pruning register bits 3 to 2 of y_p[7:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL169 : OLED12832.v(47) | Pruning unused register x_pl[7:0]. Make sure that there are no unused intermediate registers. @N:CG364 : Baud.v(18) | Synthesizing module Baud in library work. BPS_PARA=32'b00000000000000000000010011100010 Generated name = Baud_1250s Running optimization stage 1 on Baud_1250s ....... @N:CG364 : Uart_Rx.v(18) | Synthesizing module Uart_Rx in library work. @N:CG179 : Uart_Rx.v(80) | Removing redundant assignment. Running optimization stage 1 on Uart_Rx ....... @N:CG364 : Uart_Tx.v(18) | Synthesizing module Uart_Tx in library work. Running optimization stage 1 on Uart_Tx ....... @W:CL260 : Uart_Tx.v(34) | Pruning register bit 0 of tx_data_r[9:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @N:CG364 : Uart_Bus.v(18) | Synthesizing module Uart_Bus in library work. Running optimization stage 1 on Uart_Bus ....... @N:CG364 : control_module.v(1) | Synthesizing module control_module in library work. @N:CG179 : control_module.v(36) | Removing redundant assignment. @N:CG179 : control_module.v(37) | Removing redundant assignment. @N:CG179 : control_module.v(87) | Removing redundant assignment. @N:CG179 : control_module.v(87) | Removing redundant assignment. Running optimization stage 1 on control_module ....... @A:CL282 : control_module.v(66) | Feedback mux created for signal cnt_tx. It is possible a set/reset assignment for this is signal missing. To improve timing and area, specify a set/reset value. @W:CL208 : control_module.v(44) | All reachable assignments to bit 0 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 1 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 2 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 3 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 4 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 5 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 6 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 7 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 12 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 13 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 14 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 15 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 20 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 21 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 22 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 23 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 28 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 29 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 30 of temp_out[31:0] assign 0, register removed by optimization. @W:CL208 : control_module.v(44) | All reachable assignments to bit 31 of temp_out[31:0] assign 0, register removed by optimization. @W:CL113 : control_module.v(21) | Feedback mux created for signal time_out[31:28]. To avoid the feedback mux, assign values explicitly under all conditions of conditional assignment statements. @W:CL113 : control_module.v(21) | Feedback mux created for signal time_out[23:20]. To avoid the feedback mux, assign values explicitly under all conditions of conditional assignment statements. @W:CL113 : control_module.v(21) | Feedback mux created for signal time_out[15:12]. To avoid the feedback mux, assign values explicitly under all conditions of conditional assignment statements. @W:CL113 : control_module.v(21) | Feedback mux created for signal time_out[7:4]. To avoid the feedback mux, assign values explicitly under all conditions of conditional assignment statements. @W:CL250 : control_module.v(21) | All reachable assignments to time_out[31:28] assign 0, register removed by optimization @W:CL250 : control_module.v(21) | All reachable assignments to time_out[23:20] assign 0, register removed by optimization @W:CL250 : control_module.v(21) | All reachable assignments to time_out[15:12] assign 0, register removed by optimization @W:CL250 : control_module.v(21) | All reachable assignments to time_out[7:4] assign 0, register removed by optimization @N:CG364 : step_project01.v(1) | Synthesizing module step_project01 in library work. Running optimization stage 1 on step_project01 ....... Running optimization stage 2 on step_project01 ....... Running optimization stage 2 on control_module ....... @N:CL159 : control_module.v(5) | Input sw is unused. Running optimization stage 2 on Uart_Bus ....... Running optimization stage 2 on Uart_Tx ....... Running optimization stage 2 on Uart_Rx ....... Running optimization stage 2 on Baud_1250s ....... @W:CL279 : Baud.v(31) | Pruning register bits 12 to 11 of cnt[12:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. Running optimization stage 2 on OLED12832 ....... @W:CL279 : OLED12832.v(47) | Pruning register bits 15 to 5 of cnt[15:0]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 4 of cnt_main[4:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @N:CL201 : OLED12832.v(47) | Trying to extract state machine for register state. Extracted state machine for register state State machine has 6 reachable states with original encodings of: 000001 000010 000100 001000 010000 100000 @N:CL201 : OLED12832.v(47) | Trying to extract state machine for register cnt_init. Extracted state machine for register cnt_init State machine has 6 reachable states with original encodings of: 00000 00001 00010 00011 00100 00101 @W:CL260 : OLED12832.v(47) | Pruning register bit 19 of char[21:17]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 2 of x_ph[2:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 5 of y_p[5:4]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 107 of char[107:106]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : OLED12832.v(47) | Pruning register bit 126 of char[126:124]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL247 : OLED12832.v(23) | Input port bit 31 of tim[31:0] is unused @W:CL247 : OLED12832.v(23) | Input port bit 23 of tim[31:0] is unused @W:CL247 : OLED12832.v(23) | Input port bit 15 of tim[31:0] is unused @W:CL247 : OLED12832.v(23) | Input port bit 7 of tim[31:0] is unused @W:CL247 : OLED12832.v(24) | Input port bit 31 of tem[31:0] is unused @W:CL247 : OLED12832.v(24) | Input port bit 23 of tem[31:0] is unused @W:CL247 : OLED12832.v(24) | Input port bit 15 of tem[31:0] is unused @W:CL247 : OLED12832.v(24) | Input port bit 7 of tem[31:0] is unused @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[16][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[17][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[18][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[19][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[20][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[21][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[22][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[23][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[24][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[25][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[26][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[27][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[28][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[29][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[30][39:0] are referenced and tied to 0 -- simulation mismatch possible. @A:CL153 : OLED12832.v(39) | *Unassigned bits of mem[31][39:0] are referenced and tied to 0 -- simulation mismatch possible. Running optimization stage 2 on bin_to_bcd ....... Running optimization stage 2 on DS18B20Z ....... @W:CL260 : DS18B20Z.v(61) | Pruning register bit 2 of data_wr_buffer[7:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : DS18B20Z.v(61) | Pruning register bit 0 of data_wr_buffer[7:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @N:CL201 : DS18B20Z.v(61) | Trying to extract state machine for register state. Extracted state machine for register state State machine has 8 reachable states with original encodings of: 000 001 010 011 100 101 110 111 @W:CL249 : DS18B20Z.v(61) | Initial value is not supported on state machine state @W:CL260 : DS18B20Z.v(61) | Pruning register bit 8 of num_delay[8:0]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL279 : DS18B20Z.v(61) | Pruning register bits 14 to 13 of num_delay[14:12]. If this is not the intended behavior, drive the inputs with valid values, or inputs from the top level. @W:CL260 : DS18B20Z.v(61) | Pruning register bit 17 of num_delay[17:16]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : DS18B20Z.v(61) | Pruning register bit 7 of data_wr[7:3]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : DS18B20Z.v(61) | Pruning register bit 5 of data_wr[7:3]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : DS18B20Z.v(61) | Pruning register bit 7 of data_wr_buffer[7:3]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. @W:CL260 : DS18B20Z.v(61) | Pruning register bit 5 of data_wr_buffer[7:3]. If this is not the intended behavior, drive the input with valid values, or an input from the top level. For a summary of runtime and memory usage per design unit, please see file: ========================================================== Linked File: layer0.rt.csv At c_ver Exit (Real Time elapsed 0h:00m:02s; CPU Time elapsed 0h:00m:02s; Memory used current: 90MB peak: 102MB) Process took 0h:00m:02s realtime, 0h:00m:02s cputime Process completed successfully. # Mon Feb 15 12:42:42 2021 ###########################################################] Copyright (C) 1994-2018 Synopsys, Inc. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited. Tool: Synplify Pro (R) Build: N-2018.03L-SP1-1 Install: C:\lscc\diamond\3.11_x64\synpbase OS: Windows 6.2 Hostname: COMPUTERYT Implementation : impl1 Synopsys Synopsys Netlist Linker, Version comp2018q2p1, Build 461R, Built Apr 1 2019 09:17:43 @N: : | Running in 64-bit mode File C:\Users\CROFY\Documents\Diamond\Project\step_project01\impl1\synwork\layer0.srs changed - recompiling At syn_nfilter Exit (Real Time elapsed 0h:00m:00s; CPU Time elapsed 0h:00m:00s; Memory used current: 68MB peak: 69MB) Process took 0h:00m:01s realtime, 0h:00m:01s cputime Process completed successfully. # Mon Feb 15 12:42:43 2021 ###########################################################] For a summary of runtime and memory usage for all design units, please see file: ========================================================== Linked File: step_project01_impl1_comp.rt.csv @END At c_hdl Exit (Real Time elapsed 0h:00m:03s; CPU Time elapsed 0h:00m:03s; Memory used current: 3MB peak: 4MB) Process took 0h:00m:03s realtime, 0h:00m:03s cputime Process completed successfully. # Mon Feb 15 12:42:43 2021 ###########################################################]