Lattice Synthesis Timing Report -------------------------------------------------------------------------------- Lattice Synthesis Timing Report, Version Mon Feb 15 16:02:44 2021 Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2019 Lattice Semiconductor Corporation, All rights reserved. Report Information ------------------ Design: step_project01 Constraint file: Report level: verbose report, limited to 3 items per constraint -------------------------------------------------------------------------------- ================================================================================ Constraint: create_clock -period 5.000000 -name clk1 [get_nets \DS18B20Z_uut/clk_1mhz] 0 items scored, 0 timing errors detected. -------------------------------------------------------------------------------- ================================================================================ Constraint: create_clock -period 5.000000 -name clk0 [get_nets clk_c] 4096 items scored, 4096 timing errors detected. -------------------------------------------------------------------------------- Error: The following path violates requirements by 73.371ns Logical Details: Cell type Pin type Cell name (clock net +/-) Source: FD1P3AX CK \DS18B20Z_uut/data_out_i0_i15 (from clk_c +) Destination: FD1P3IX D \control_module_uut/tx_data_out_i4 (to clk_c +) Delay: 78.211ns (30.9% logic, 69.1% route), 51 logic levels. Constraint Details: 78.211ns data_path \DS18B20Z_uut/data_out_i0_i15 to \control_module_uut/tx_data_out_i4 violates 5.000ns delay constraint less 0.160ns L_S requirement (totaling 4.840ns) by 73.371ns Path Details: \DS18B20Z_uut/data_out_i0_i15 to \control_module_uut/tx_data_out_i4 Name Fanout Delay (ns) Pins Resource(Cell.Net) L_CO --- 0.444 CK to Q \DS18B20Z_uut/data_out_i0_i15 (from clk_c) Route 1 e 0.941 data_out[15] LUT4 --- 0.493 B to Z i2_3_lut_adj_496 Route 7 e 1.502 n8 LUT4 --- 0.493 C to Z i2_3_lut Route 38 e 2.049 temperature_flag_N_23 LUT4 --- 0.493 C to Z temperature_code_10__I_0_10_i5_3_lut Route 2 e 1.141 temperature_code[4] A1_TO_FCO --- 0.827 A[2] to COUT add_6310_1 Route 1 e 0.020 n41375 FCI_TO_FCO --- 0.157 CIN to COUT add_6310_3 Route 1 e 0.020 n41376 FCI_TO_F --- 0.598 CIN to S[2] add_6310_5 Route 1 e 0.020 n10653 A1_TO_FCO --- 0.827 A[2] to COUT add_6375_3 Route 1 e 0.020 n41454 FCI_TO_FCO --- 0.157 CIN to COUT add_6375_5 Route 1 e 0.020 n41455 FCI_TO_FCO --- 0.157 CIN to COUT add_6375_7 Route 1 e 0.020 n41456 FCI_TO_FCO --- 0.157 CIN to COUT add_6375_9 Route 1 e 0.020 n41457 FCI_TO_F --- 0.598 CIN to S[2] add_6375_11 Route 1 e 0.020 n10746 A1_TO_FCO --- 0.827 A[2] to COUT add_6374_7 Route 1 e 0.020 n41450 FCI_TO_FCO --- 0.157 CIN to COUT add_6374_9 Route 1 e 0.020 n41451 FCI_TO_FCO --- 0.157 CIN to COUT add_6374_11 Route 1 e 0.020 n41452 FCI_TO_F --- 0.598 CIN to S[2] add_6374_cout Route 14 e 2.153 bin_code[20] LUT4 --- 0.493 D to Z \bin_to_bcd_uut/bin_code[17]_bdd_3_lut_40550_4_lut_4_lut Route 1 e 0.020 \bin_to_bcd_uut/n45495 MUXL5 --- 0.233 ALUT to Z \bin_to_bcd_uut/i40551 Route 10 e 1.604 n7554 LUT4 --- 0.493 C to Z i2_4_lut Route 8 e 1.540 bcd_code_24__N_344 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3800_3_lut_4_lut Route 6 e 1.457 \bin_to_bcd_uut/n7558 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i4543_3_lut_4_lut Route 11 e 1.632 \bin_to_bcd_uut/bcd_code_24__N_362 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3801_3_lut_rep_701_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46478 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4571_3_lut_4_lut Route 11 e 1.632 \bin_to_bcd_uut/bcd_code_24__N_380 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3802_3_lut_rep_691_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46468 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4599_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_407 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i4641_3_lut_4_lut_3_lut_4_lut Route 5 e 1.405 \bin_to_bcd_uut/bcd_code_24__N_402 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i4716_2_lut_rep_674_3_lut Route 5 e 1.405 \bin_to_bcd_uut/n46451 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i3807_3_lut_rep_669_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46446 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4711_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_425 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3809_3_lut_rep_657_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46434 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4767_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_463 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3812_3_lut_rep_645_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46422 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4823_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_499 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3815_3_lut_rep_630_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46407 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4907_3_lut_4_lut Route 10 e 1.604 \bin_to_bcd_uut/bcd_code_24__N_541 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3818_3_lut_rep_615_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46392 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4991_3_lut_4_lut Route 10 e 1.604 \bin_to_bcd_uut/bcd_code_24__N_590 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3822_3_lut_rep_596_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46373 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5075_3_lut_4_lut Route 10 e 1.604 \bin_to_bcd_uut/bcd_code_24__N_641 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3826_3_lut_rep_574_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46351 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5187_3_lut_4_lut Route 10 e 1.604 \bin_to_bcd_uut/bcd_code_24__N_692 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3830_3_lut_rep_556_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46333 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5299_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_743 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3835_3_lut_rep_537_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46314 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5411_3_lut_4_lut Route 5 e 1.405 \bin_to_bcd_uut/bcd_code_24__N_785 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3839_3_lut_rep_520_4_lut Route 1 e 0.941 \bin_to_bcd_uut/n46297 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5523_3_lut_4_lut Route 1 e 0.941 \bin_to_bcd_uut/bcd_code_24__N_818 LUT4 --- 0.493 A to Z \bin_to_bcd_uut/i4502_4_lut Route 1 e 0.941 \bin_to_bcd_uut/n8638 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i4475_4_lut Route 1 e 0.941 \bin_to_bcd_uut/n2 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i15_4_lut Route 2 e 1.141 bcd_code_24__N_804 LUT4 --- 0.493 C to Z \control_module_uut/i14573_3_lut_4_lut Route 1 e 0.941 \control_module_uut/n19097 -------- 78.211 (30.9% logic, 69.1% route), 51 logic levels. Error: The following path violates requirements by 73.371ns Logical Details: Cell type Pin type Cell name (clock net +/-) Source: FD1P3AX CK \DS18B20Z_uut/data_out_i0_i15 (from clk_c +) Destination: FD1P3IX D \control_module_uut/tx_data_out_i4 (to clk_c +) Delay: 78.211ns (30.9% logic, 69.1% route), 51 logic levels. Constraint Details: 78.211ns data_path \DS18B20Z_uut/data_out_i0_i15 to \control_module_uut/tx_data_out_i4 violates 5.000ns delay constraint less 0.160ns L_S requirement (totaling 4.840ns) by 73.371ns Path Details: \DS18B20Z_uut/data_out_i0_i15 to \control_module_uut/tx_data_out_i4 Name Fanout Delay (ns) Pins Resource(Cell.Net) L_CO --- 0.444 CK to Q \DS18B20Z_uut/data_out_i0_i15 (from clk_c) Route 1 e 0.941 data_out[15] LUT4 --- 0.493 B to Z i2_3_lut_adj_496 Route 7 e 1.502 n8 LUT4 --- 0.493 C to Z i2_3_lut Route 38 e 2.049 temperature_flag_N_23 LUT4 --- 0.493 C to Z temperature_code_10__I_0_10_i5_3_lut Route 2 e 1.141 temperature_code[4] A1_TO_FCO --- 0.827 A[2] to COUT add_6310_1 Route 1 e 0.020 n41375 FCI_TO_F --- 0.598 CIN to S[2] add_6310_3 Route 1 e 0.020 n10655 A1_TO_FCO --- 0.827 A[2] to COUT add_6375_1 Route 1 e 0.020 n41453 FCI_TO_FCO --- 0.157 CIN to COUT add_6375_3 Route 1 e 0.020 n41454 FCI_TO_FCO --- 0.157 CIN to COUT add_6375_5 Route 1 e 0.020 n41455 FCI_TO_FCO --- 0.157 CIN to COUT add_6375_7 Route 1 e 0.020 n41456 FCI_TO_FCO --- 0.157 CIN to COUT add_6375_9 Route 1 e 0.020 n41457 FCI_TO_FCO --- 0.157 CIN to COUT add_6375_11 Route 1 e 0.020 n41458 FCI_TO_F --- 0.598 CIN to S[2] add_6375_13 Route 1 e 0.020 n10745 A1_TO_FCO --- 0.827 A[2] to COUT add_6374_9 Route 1 e 0.020 n41451 FCI_TO_FCO --- 0.157 CIN to COUT add_6374_11 Route 1 e 0.020 n41452 FCI_TO_F --- 0.598 CIN to S[2] add_6374_cout Route 14 e 2.153 bin_code[20] LUT4 --- 0.493 D to Z \bin_to_bcd_uut/bin_code[17]_bdd_3_lut_40550_4_lut_4_lut Route 1 e 0.020 \bin_to_bcd_uut/n45495 MUXL5 --- 0.233 ALUT to Z \bin_to_bcd_uut/i40551 Route 10 e 1.604 n7554 LUT4 --- 0.493 C to Z i2_4_lut Route 8 e 1.540 bcd_code_24__N_344 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3800_3_lut_4_lut Route 6 e 1.457 \bin_to_bcd_uut/n7558 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i4543_3_lut_4_lut Route 11 e 1.632 \bin_to_bcd_uut/bcd_code_24__N_362 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3801_3_lut_rep_701_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46478 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4571_3_lut_4_lut Route 11 e 1.632 \bin_to_bcd_uut/bcd_code_24__N_380 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3802_3_lut_rep_691_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46468 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4599_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_407 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i4641_3_lut_4_lut_3_lut_4_lut Route 5 e 1.405 \bin_to_bcd_uut/bcd_code_24__N_402 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i4716_2_lut_rep_674_3_lut Route 5 e 1.405 \bin_to_bcd_uut/n46451 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i3807_3_lut_rep_669_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46446 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4711_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_425 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3809_3_lut_rep_657_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46434 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4767_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_463 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3812_3_lut_rep_645_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46422 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4823_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_499 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3815_3_lut_rep_630_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46407 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4907_3_lut_4_lut Route 10 e 1.604 \bin_to_bcd_uut/bcd_code_24__N_541 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3818_3_lut_rep_615_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46392 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4991_3_lut_4_lut Route 10 e 1.604 \bin_to_bcd_uut/bcd_code_24__N_590 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3822_3_lut_rep_596_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46373 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5075_3_lut_4_lut Route 10 e 1.604 \bin_to_bcd_uut/bcd_code_24__N_641 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3826_3_lut_rep_574_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46351 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5187_3_lut_4_lut Route 10 e 1.604 \bin_to_bcd_uut/bcd_code_24__N_692 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3830_3_lut_rep_556_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46333 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5299_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_743 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3835_3_lut_rep_537_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46314 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5411_3_lut_4_lut Route 5 e 1.405 \bin_to_bcd_uut/bcd_code_24__N_785 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3839_3_lut_rep_520_4_lut Route 1 e 0.941 \bin_to_bcd_uut/n46297 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5523_3_lut_4_lut Route 1 e 0.941 \bin_to_bcd_uut/bcd_code_24__N_818 LUT4 --- 0.493 A to Z \bin_to_bcd_uut/i4502_4_lut Route 1 e 0.941 \bin_to_bcd_uut/n8638 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i4475_4_lut Route 1 e 0.941 \bin_to_bcd_uut/n2 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i15_4_lut Route 2 e 1.141 bcd_code_24__N_804 LUT4 --- 0.493 C to Z \control_module_uut/i14573_3_lut_4_lut Route 1 e 0.941 \control_module_uut/n19097 -------- 78.211 (30.9% logic, 69.1% route), 51 logic levels. Error: The following path violates requirements by 73.371ns Logical Details: Cell type Pin type Cell name (clock net +/-) Source: FD1P3AX CK \DS18B20Z_uut/data_out_i0_i15 (from clk_c +) Destination: FD1P3IX D \control_module_uut/tx_data_out_i4 (to clk_c +) Delay: 78.211ns (30.9% logic, 69.1% route), 51 logic levels. Constraint Details: 78.211ns data_path \DS18B20Z_uut/data_out_i0_i15 to \control_module_uut/tx_data_out_i4 violates 5.000ns delay constraint less 0.160ns L_S requirement (totaling 4.840ns) by 73.371ns Path Details: \DS18B20Z_uut/data_out_i0_i15 to \control_module_uut/tx_data_out_i4 Name Fanout Delay (ns) Pins Resource(Cell.Net) L_CO --- 0.444 CK to Q \DS18B20Z_uut/data_out_i0_i15 (from clk_c) Route 1 e 0.941 data_out[15] LUT4 --- 0.493 B to Z i2_3_lut_adj_496 Route 7 e 1.502 n8 LUT4 --- 0.493 C to Z i2_3_lut Route 38 e 2.049 temperature_flag_N_23 LUT4 --- 0.493 C to Z temperature_code_10__I_0_10_i5_3_lut Route 2 e 1.141 temperature_code[4] A1_TO_FCO --- 0.827 A[2] to COUT add_6310_1 Route 1 e 0.020 n41375 FCI_TO_FCO --- 0.157 CIN to COUT add_6310_3 Route 1 e 0.020 n41376 FCI_TO_FCO --- 0.157 CIN to COUT add_6310_5 Route 1 e 0.020 n41377 FCI_TO_F --- 0.598 CIN to S[2] add_6310_7 Route 1 e 0.020 n10651 A1_TO_FCO --- 0.827 A[2] to COUT add_6375_5 Route 1 e 0.020 n41455 FCI_TO_FCO --- 0.157 CIN to COUT add_6375_7 Route 1 e 0.020 n41456 FCI_TO_FCO --- 0.157 CIN to COUT add_6375_9 Route 1 e 0.020 n41457 FCI_TO_FCO --- 0.157 CIN to COUT add_6375_11 Route 1 e 0.020 n41458 FCI_TO_FCO --- 0.157 CIN to COUT add_6375_13 Route 1 e 0.020 n41459 FCI_TO_F --- 0.598 CIN to S[2] add_6375_cout Route 1 e 0.020 n10762 A1_TO_FCO --- 0.827 A[2] to COUT add_6374_11 Route 1 e 0.020 n41452 FCI_TO_F --- 0.598 CIN to S[2] add_6374_cout Route 14 e 2.153 bin_code[20] LUT4 --- 0.493 B to Z \bin_to_bcd_uut/bin_code[17]_bdd_3_lut_2_lut_2_lut Route 1 e 0.020 \bin_to_bcd_uut/n45496 MUXL5 --- 0.233 BLUT to Z \bin_to_bcd_uut/i40551 Route 10 e 1.604 n7554 LUT4 --- 0.493 C to Z i2_4_lut Route 8 e 1.540 bcd_code_24__N_344 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3800_3_lut_4_lut Route 6 e 1.457 \bin_to_bcd_uut/n7558 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i4543_3_lut_4_lut Route 11 e 1.632 \bin_to_bcd_uut/bcd_code_24__N_362 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3801_3_lut_rep_701_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46478 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4571_3_lut_4_lut Route 11 e 1.632 \bin_to_bcd_uut/bcd_code_24__N_380 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3802_3_lut_rep_691_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46468 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4599_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_407 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i4641_3_lut_4_lut_3_lut_4_lut Route 5 e 1.405 \bin_to_bcd_uut/bcd_code_24__N_402 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i4716_2_lut_rep_674_3_lut Route 5 e 1.405 \bin_to_bcd_uut/n46451 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i3807_3_lut_rep_669_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46446 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4711_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_425 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3809_3_lut_rep_657_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46434 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4767_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_463 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3812_3_lut_rep_645_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46422 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4823_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_499 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3815_3_lut_rep_630_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46407 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4907_3_lut_4_lut Route 10 e 1.604 \bin_to_bcd_uut/bcd_code_24__N_541 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3818_3_lut_rep_615_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46392 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i4991_3_lut_4_lut Route 10 e 1.604 \bin_to_bcd_uut/bcd_code_24__N_590 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3822_3_lut_rep_596_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46373 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5075_3_lut_4_lut Route 10 e 1.604 \bin_to_bcd_uut/bcd_code_24__N_641 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3826_3_lut_rep_574_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46351 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5187_3_lut_4_lut Route 10 e 1.604 \bin_to_bcd_uut/bcd_code_24__N_692 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3830_3_lut_rep_556_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46333 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5299_3_lut_4_lut Route 9 e 1.574 \bin_to_bcd_uut/bcd_code_24__N_743 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3835_3_lut_rep_537_4_lut Route 3 e 1.258 \bin_to_bcd_uut/n46314 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5411_3_lut_4_lut Route 5 e 1.405 \bin_to_bcd_uut/bcd_code_24__N_785 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i3839_3_lut_rep_520_4_lut Route 1 e 0.941 \bin_to_bcd_uut/n46297 LUT4 --- 0.493 D to Z \bin_to_bcd_uut/i5523_3_lut_4_lut Route 1 e 0.941 \bin_to_bcd_uut/bcd_code_24__N_818 LUT4 --- 0.493 A to Z \bin_to_bcd_uut/i4502_4_lut Route 1 e 0.941 \bin_to_bcd_uut/n8638 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i4475_4_lut Route 1 e 0.941 \bin_to_bcd_uut/n2 LUT4 --- 0.493 C to Z \bin_to_bcd_uut/i15_4_lut Route 2 e 1.141 bcd_code_24__N_804 LUT4 --- 0.493 C to Z \control_module_uut/i14573_3_lut_4_lut Route 1 e 0.941 \control_module_uut/n19097 -------- 78.211 (30.9% logic, 69.1% route), 51 logic levels. Warning: 78.371 ns is the maximum delay for this constraint. Timing Report Summary -------------- -------------------------------------------------------------------------------- Constraint | Constraint| Actual|Levels -------------------------------------------------------------------------------- | | | create_clock -period 5.000000 -name | | | clk1 [get_nets \DS18B20Z_uut/clk_1mhz] | -| -| 0 | | | create_clock -period 5.000000 -name | | | clk0 [get_nets clk_c] | 5.000 ns| 78.371 ns| 51 * | | | -------------------------------------------------------------------------------- 1 constraints not met. -------------------------------------------------------------------------------- Critical Nets | Loads| Errors| % of total -------------------------------------------------------------------------------- \bin_to_bcd_uut/bcd_code_24__N_407 | 9| 4096| 99.00% | | | \bin_to_bcd_uut/bcd_code_24__N_818 | 1| 4096| 99.00% | | | \bin_to_bcd_uut/n2 | 1| 4096| 99.00% | | | \bin_to_bcd_uut/n7558 | 6| 4096| 99.00% | | | \bin_to_bcd_uut/n8638 | 1| 4096| 99.00% | | | \bin_to_bcd_uut/n46297 | 1| 4096| 99.00% | | | \bin_to_bcd_uut/n46314 | 3| 4096| 99.00% | | | \bin_to_bcd_uut/n46333 | 3| 4096| 99.00% | | | \bin_to_bcd_uut/n46468 | 3| 4096| 99.00% | | | \bin_to_bcd_uut/n46478 | 3| 4096| 99.00% | | | \control_module_uut/n19097 | 1| 4096| 99.00% | | | bcd_code_24__N_344 | 8| 4096| 99.00% | | | bcd_code_24__N_804 | 2| 4096| 99.00% | | | bin_code[20] | 14| 4096| 99.00% | | | n8 | 7| 4096| 99.00% | | | n7554 | 10| 4096| 99.00% | | | n41452 | 1| 4096| 99.00% | | | temperature_flag_N_23 | 38| 4096| 99.00% | | | \bin_to_bcd_uut/bcd_code_24__N_362 | 11| 3832| 93.55% | | | \bin_to_bcd_uut/bcd_code_24__N_380 | 11| 3832| 93.55% | | | \bin_to_bcd_uut/bcd_code_24__N_743 | 9| 3832| 93.55% | | | \bin_to_bcd_uut/n46351 | 3| 3832| 93.55% | | | \bin_to_bcd_uut/bcd_code_24__N_692 | 10| 3819| 93.24% | | | n41375 | 1| 3688| 90.04% | | | temperature_code[4] | 2| 3688| 90.04% | | | \bin_to_bcd_uut/bcd_code_24__N_785 | 5| 3568| 87.11% | | | \bin_to_bcd_uut/n46373 | 3| 3568| 87.11% | | | \bin_to_bcd_uut/bcd_code_24__N_641 | 10| 3555| 86.79% | | | n41451 | 1| 3490| 85.21% | | | \bin_to_bcd_uut/n46392 | 3| 3304| 80.66% | | | \bin_to_bcd_uut/bcd_code_24__N_590 | 10| 3291| 80.35% | | | n41376 | 1| 3248| 79.30% | | | \bin_to_bcd_uut/n46407 | 3| 2776| 67.77% | | | \bin_to_bcd_uut/bcd_code_24__N_541 | 10| 2763| 67.46% | | | n41456 | 1| 2590| 63.23% | | | \bin_to_bcd_uut/bcd_code_24__N_499 | 9| 2512| 61.33% | | | \bin_to_bcd_uut/n46422 | 3| 2512| 61.33% | | | n41455 | 1| 2454| 59.91% | | | n41450 | 1| 2370| 57.86% | | | n41457 | 1| 2342| 57.18% | | | n41377 | 1| 2286| 55.81% | | | \bin_to_bcd_uut/bcd_code_24__N_463 | 9| 2248| 54.88% | | | \bin_to_bcd_uut/n46434 | 3| 2248| 54.88% | | | \bin_to_bcd_uut/bcd_code_24__N_434 | 9| 2112| 51.56% | | | \bin_to_bcd_uut/n46462 | 3| 2112| 51.56% | | | \bin_to_bcd_uut/n45495 | 1| 2070| 50.54% | | | \bin_to_bcd_uut/n45496 | 1| 2026| 49.46% | | | \bin_to_bcd_uut/bcd_code_24__N_402 | 5| 1984| 48.44% | | | \bin_to_bcd_uut/bcd_code_24__N_425 | 9| 1984| 48.44% | | | \bin_to_bcd_uut/n46446 | 3| 1984| 48.44% | | | \bin_to_bcd_uut/n46451 | 5| 1984| 48.44% | | | \bin_to_bcd_uut/bcd_code_24__N_472 | 9| 1848| 45.12% | | | \bin_to_bcd_uut/n46455 | 3| 1848| 45.12% | | | n41454 | 1| 1756| 42.87% | | | n41458 | 1| 1726| 42.14% | | | \bin_to_bcd_uut/bcd_code_24__N_508 | 9| 1584| 38.67% | | | \bin_to_bcd_uut/n46445 | 3| 1584| 38.67% | | | n41449 | 1| 1446| 35.30% | | | n41378 | 1| 1426| 34.81% | | | data_out[13] | 1| 1380| 33.69% | | | data_out[15] | 1| 1364| 33.30% | | | data_out[11] | 1| 1352| 33.01% | | | \bin_to_bcd_uut/bcd_code_24__N_550 | 9| 1320| 32.23% | | | \bin_to_bcd_uut/n46433 | 3| 1320| 32.23% | | | n10653 | 1| 908| 22.17% | | | n10651 | 1| 818| 19.97% | | | \bin_to_bcd_uut/bcd_code_24__N_599 | 9| 792| 19.34% | | | \bin_to_bcd_uut/n46420 | 3| 792| 19.34% | | | n10655 | 1| 788| 19.24% | | | n41453 | 1| 788| 19.24% | | | n41379 | 1| 762| 18.60% | | | n41448 | 1| 714| 17.43% | | | n10649 | 1| 634| 15.48% | | | n10762 | 1| 606| 14.79% | | | n41459 | 1| 606| 14.79% | | | n10745 | 1| 562| 13.72% | | | n10744 | 1| 558| 13.62% | | | \bin_to_bcd_uut/n46398 | 5| 541| 13.21% | | | \bin_to_bcd_uut/bcd_code_24__N_545 | 5| 528| 12.89% | | | \bin_to_bcd_uut/bcd_code_24__N_650 | 9| 528| 12.89% | | | \bin_to_bcd_uut/n46303 | 3| 528| 12.89% | | | \bin_to_bcd_uut/n46405 | 3| 528| 12.89% | | | n10746 | 1| 462| 11.28% | | | n10747 | 1| 462| 11.28% | | | n10647 | 1| 454| 11.08% | | | -------------------------------------------------------------------------------- Timing summary: --------------- Timing errors: 4096 Score: 300046736 Constraints cover >4294967295 paths, 2288 nets, and 7239 connections (96.5% coverage) Peak memory: 170029056 bytes, TRCE: 26136576 bytes, DLYMAN: 655360 bytes CPU_TIME_REPORT: 0 secs