PAD Specification File
***************************

PART TYPE:        iCE40UP5K
Performance Grade:      High-Performance_1.2V
PACKAGE:          SG48
Package Status:                     Preliminary    Version 1.5

Mon Sep 24 15:06:26 2018

Pinout by Port Name:
+------------------+----------+--------------+-------+--------------------+
| Port Name        | Pin/Bank | Buffer Type  | Site  | Properties         |
+------------------+----------+--------------+-------+--------------------+
| i_analog_cmp     | 42/0     | LVDSE_IN     | PR9A  | PULL:NA            |
| i_clk_in         | 35/0     | LVCMOS25_IN  | PR13B | PULL:100K          |
| i_rst_in         | 3/2      | LVCMOS33_IN  | PL10B | PULL:100K          |
| o_analog_out     | 4/2      | LVCMOS33_OUT | PL10A | DRIVE:8mA PULL:NA  |
| o_digital_out[0] | 9/1      | LVCMOS33_OUT | PL16A | DRIVE:8mA PULL:NA  |
| o_digital_out[1] | 21/1     | LVCMOS33_OUT | PL19B | DRIVE:8mA PULL:NA  |
| o_digital_out[2] | 11/1     | LVCMOS33_OUT | PL18A | DRIVE:8mA PULL:NA  |
| o_digital_out[3] | 12/1     | LVCMOS33_OUT | PL19A | DRIVE:8mA PULL:NA  |
| o_digital_out[4] | 19/1     | LVCMOS33_OUT | PL22B | DRIVE:8mA PULL:NA  |
| o_digital_out[5] | 13/1     | LVCMOS33_OUT | PL20A | DRIVE:8mA PULL:NA  |
| o_digital_out[6] | 20/1     | LVCMOS33_OUT | PL20B | DRIVE:8mA PULL:NA  |
| o_digital_out[7] | 10/1     | LVCMOS33_OUT | PL17A | DRIVE:8mA PULL:NA  |
| o_sample_rdy     | 6/1      | LVCMOS33_OUT | PL14B | DRIVE:8mA PULL:NA  |
+------------------+----------+--------------+-------+--------------------+

Vccio by Bank:
+------+-------+
| Bank | Vccio |
+------+-------+
| 0    | 2.5V  |
| 1    | 3.3V  |
| 2    | 3.3V  |
+------+-------+

Pinout by Pin Number:
+----------+---------------------+------------+--------------+-------+------------------+
| Pin/Bank | Pin Info            | Preference | Buffer Type  | Site  | Dual Function    |
+----------+---------------------+------------+--------------+-------+------------------+
| 2/2      |     unused, PULL:UP |            |              | PL9A  |                  |
| 3/2      | i_rst_in            |            | LVCMOS33_IN  | PL10B |                  |
| 4/2      | o_analog_out        | LOCATED    | LVCMOS33_OUT | PL10A |                  |
| 6/1      | o_sample_rdy        |            | LVCMOS33_OUT | PL14B |                  |
| 9/1      | o_digital_out[0]    |            | LVCMOS33_OUT | PL16A |                  |
| 10/1     | o_digital_out[7]    |            | LVCMOS33_OUT | PL17A |                  |
| 11/1     | o_digital_out[2]    |            | LVCMOS33_OUT | PL18A |                  |
| 12/1     | o_digital_out[3]    |            | LVCMOS33_OUT | PL19A |                  |
| 13/1     | o_digital_out[5]    |            | LVCMOS33_OUT | PL20A |                  |
| 14/1     |     unused, PULL:UP |            |              | PL24A | SPI_SO           |
| 15/1     |     unused, PULL:UP |            |              | PL25A | SPISCK           |
| 16/1     |     unused, PULL:UP |            |              | PL25B | SPI_SS           |
| 17/1     |     unused, PULL:UP |            |              | PL24B | SPI_SI           |
| 18/1     |     unused, PULL:UP |            |              | PL23B |                  |
| 19/1     | o_digital_out[4]    |            | LVCMOS33_OUT | PL22B |                  |
| 20/1     | o_digital_out[6]    |            | LVCMOS33_OUT | PL20B | PCLKT1_0         |
| 21/1     | o_digital_out[1]    |            | LVCMOS33_OUT | PL19B |                  |
| 23/0     |     unused, PULL:UP |            |              | PR20A |                  |
| 25/0     |     unused, PULL:UP |            |              | PR20B |                  |
| 26/0     |     unused, PULL:UP |            |              | PR19A |                  |
| 27/0     |     unused, PULL:UP |            |              | PR19B |                  |
| 28/0     |     unused, PULL:UP |            |              | PR18A |                  |
| 31/0     |     unused, PULL:UP |            |              | PR17B |                  |
| 32/0     |     unused, PULL:UP |            |              | PR17A |                  |
| 34/0     |     unused, PULL:UP |            |              | PR14B |                  |
| 35/0     | i_clk_in            |            | LVCMOS25_IN  | PR13B | GPLL_IN/PCLKT0_1 |
| 36/0     |     unused, PULL:UP |            |              | PR10B |                  |
| 37/0     |     unused, PULL:UP |            |              | PR14A | PCLKT0_0         |
| 38/0     | i_analog_cmp-       |            | LVDSE_IN     | PR9B  |                  |
| 39/0     |                     |            |              | PR5A  | RGB0             |
| 40/0     |                     |            |              | PR6A  | RGB1             |
| 41/0     |                     |            |              | PR7A  | RGB2             |
| 42/0     | i_analog_cmp+       | LOCATED    | LVDSE_IN     | PR9A  |                  |
| 43/0     |     unused, PULL:UP |            |              | PR10A |                  |
| 44/2     |     unused, PULL:UP |            |              | PL7B  | PCLKT2_0         |
| 45/2     |     unused, PULL:UP |            |              | PL8B  |                  |
| 46/2     |     unused, PULL:UP |            |              | PL6A  |                  |
| 47/2     |     unused, PULL:UP |            |              | PL7A  |                  |
| 48/2     |     unused, PULL:UP |            |              | PL8A  |                  |
| PL6B/2   |     unused, PULL:UP |            |              | PL6B  |                  |
| PL9B/2   |     unused, PULL:UP |            |              | PL9B  |                  |
| PL13A/1  |     unused, PULL:UP |            |              | PL13A |                  |
| PL13B/1  |     unused, PULL:UP |            |              | PL13B | PCLKT1_2         |
| PL14A/1  |     unused, PULL:UP |            |              | PL14A | PCLKT1_1         |
| PL15A/1  |     unused, PULL:UP |            |              | PL15A |                  |
| PL15B/1  |     unused, PULL:UP |            |              | PL15B |                  |
| PL16B/1  |     unused, PULL:UP |            |              | PL16B |                  |
| PL17B/1  |     unused, PULL:UP |            |              | PL17B |                  |
| PL18B/1  |     unused, PULL:UP |            |              | PL18B |                  |
| PL21A/1  |     unused, PULL:UP |            |              | PL21A |                  |
| PL21B/1  |     unused, PULL:UP |            |              | PL21B |                  |
| PL22A/1  |     unused, PULL:UP |            |              | PL22A |                  |
| PL23A/1  |     unused, PULL:UP |            |              | PL23A |                  |
| PR13A/0  |     unused, PULL:UP |            |              | PR13A |                  |
| PR18B/0  |     unused, PULL:UP |            |              | PR18B |                  |
| PR22A/0  |     unused, PULL:UP |            |              | PR22A |                  |
+----------+---------------------+------------+--------------+-------+------------------+


Locate Preferences for each Pin: 

ldc_set_location -site {42} [ get_ports {i_analog_cmp} ]
ldc_set_location -site {35} [ get_ports {i_clk_in} ]
ldc_set_location -site {3} [ get_ports {i_rst_in} ]
ldc_set_location -site {4} [ get_ports {o_analog_out} ]
ldc_set_location -site {9} [ get_ports {o_digital_out[0]} ]
ldc_set_location -site {21} [ get_ports {o_digital_out[1]} ]
ldc_set_location -site {11} [ get_ports {o_digital_out[2]} ]
ldc_set_location -site {12} [ get_ports {o_digital_out[3]} ]
ldc_set_location -site {19} [ get_ports {o_digital_out[4]} ]
ldc_set_location -site {13} [ get_ports {o_digital_out[5]} ]
ldc_set_location -site {20} [ get_ports {o_digital_out[6]} ]
ldc_set_location -site {10} [ get_ports {o_digital_out[7]} ]
ldc_set_location -site {6} [ get_ports {o_sample_rdy} ]





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Mon Sep 24 15:06:26 2018






















































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