Lattice Synthesis Timing Report
--------------------------------------------------------------------------------
Lattice Synthesis Timing Report, Version  
Tue Feb 23 11:26:17 2021

Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp.   All rights reserved.
Copyright (c) 1995-2001 Lucent Technologies Inc.  All rights reserved.
Copyright (c) 2001 Agere Systems   All rights reserved.
Copyright (c) 2002-2019 Lattice Semiconductor Corporation,  All rights reserved.

Report Information
------------------
Design:     lf_project
Constraint file:  
Report level:    verbose report, limited to 3 items per constraint
--------------------------------------------------------------------------------



================================================================================
Constraint: create_clock -period 5.000000 -name clk5 [get_nets uart_en]
            1 item scored, 0 timing errors detected.
--------------------------------------------------------------------------------


Passed:  The following path meets requirements by 1.564ns

 Logical Details:  Cell type  Pin type       Cell name  (clock net +/-)

   Source:         FD1S3AX    CK             \uart_tx_lf/flag_1_33  (from uart_en +)
   Destination:    FD1S3AX    D              \uart_tx_lf/flag_1_33  (to uart_en +)

   Delay:                   3.276ns  (28.6% logic, 71.4% route), 2 logic levels.

 Constraint Details:

      3.276ns data_path \uart_tx_lf/flag_1_33 to \uart_tx_lf/flag_1_33 meets
      5.000ns delay constraint less
      0.160ns L_S requirement (totaling 4.840ns) by 1.564ns

 Path Details: \uart_tx_lf/flag_1_33 to \uart_tx_lf/flag_1_33

   Name    Fanout   Delay (ns)          Pins               Resource(Cell.Net)
L_CO        ---     0.444             CK to Q              \uart_tx_lf/flag_1_33 (from uart_en)
Route         4   e 1.398                                  \uart_tx_lf/flag_1
LUT4        ---     0.493              A to Z              \uart_tx_lf/flag_1_I_0_1_lut
Route         1   e 0.941                                  \uart_tx_lf/flag_1_N_2172
                  --------
                    3.276  (28.6% logic, 71.4% route), 2 logic levels.

Report: 3.436 ns is the maximum delay for this constraint.



================================================================================
Constraint: create_clock -period 5.000000 -name clk4 [get_nets clk_o]
            124 items scored, 88 timing errors detected.
--------------------------------------------------------------------------------


Error:  The following path violates requirements by 3.725ns

 Logical Details:  Cell type  Pin type       Cell name  (clock net +/-)

   Source:         FD1P3IX    CK             \uart_tx_lf/i_i0  (from clk_o +)
   Destination:    FD1P3AX    D              \uart_tx_lf/uart_out_40  (to clk_o +)

   Delay:                   8.565ns  (33.6% logic, 66.4% route), 7 logic levels.

 Constraint Details:

      8.565ns data_path \uart_tx_lf/i_i0 to \uart_tx_lf/uart_out_40 violates
      5.000ns delay constraint less
      0.160ns L_S requirement (totaling 4.840ns) by 3.725ns

 Path Details: \uart_tx_lf/i_i0 to \uart_tx_lf/uart_out_40

   Name    Fanout   Delay (ns)          Pins               Resource(Cell.Net)
L_CO        ---     0.444             CK to Q              \uart_tx_lf/i_i0 (from clk_o)
Route        18   e 1.879                                  \uart_tx_lf/i[0]
LUT4        ---     0.493              B to Z              \uart_tx_lf/uart_data[3]_bdd_3_lut_75647
Route         1   e 0.941                                  \uart_tx_lf/n86674
LUT4        ---     0.493              A to Z              \uart_tx_lf/n86674_bdd_3_lut_75885
Route         1   e 0.020                                  \uart_tx_lf/n86675
MUXL5       ---     0.233           ALUT to Z              \uart_tx_lf/i75015
Route         1   e 0.941                                  \uart_tx_lf/n86677
LUT4        ---     0.493              A to Z              \uart_tx_lf/i74535_3_lut
Route         1   e 0.941                                  \uart_tx_lf/n85237
LUT4        ---     0.493              A to Z              \uart_tx_lf/i74560_3_lut
Route         1   e 0.020                                  \uart_tx_lf/n85308
MUXL5       ---     0.233           BLUT to Z              \uart_tx_lf/i74198
Route         1   e 0.941                                  \uart_tx_lf/uart_out_N_2169
                  --------
                    8.565  (33.6% logic, 66.4% route), 7 logic levels.


Error:  The following path violates requirements by 3.725ns

 Logical Details:  Cell type  Pin type       Cell name  (clock net +/-)

   Source:         FD1P3IX    CK             \uart_tx_lf/i_i0  (from clk_o +)
   Destination:    FD1P3AX    D              \uart_tx_lf/uart_out_40  (to clk_o +)

   Delay:                   8.565ns  (33.6% logic, 66.4% route), 7 logic levels.

 Constraint Details:

      8.565ns data_path \uart_tx_lf/i_i0 to \uart_tx_lf/uart_out_40 violates
      5.000ns delay constraint less
      0.160ns L_S requirement (totaling 4.840ns) by 3.725ns

 Path Details: \uart_tx_lf/i_i0 to \uart_tx_lf/uart_out_40

   Name    Fanout   Delay (ns)          Pins               Resource(Cell.Net)
L_CO        ---     0.444             CK to Q              \uart_tx_lf/i_i0 (from clk_o)
Route        18   e 1.879                                  \uart_tx_lf/i[0]
LUT4        ---     0.493              C to Z              \uart_tx_lf/i74176_3_lut
Route         1   e 0.020                                  \uart_tx_lf/n85288
MUXL5       ---     0.233           ALUT to Z              \uart_tx_lf/i74177
Route         1   e 0.941                                  \uart_tx_lf/n85289
LUT4        ---     0.493              B to Z              \uart_tx_lf/i74124_4_lut
Route         1   e 0.941                                  \uart_tx_lf/n85236
LUT4        ---     0.493              B to Z              \uart_tx_lf/i74535_3_lut
Route         1   e 0.941                                  \uart_tx_lf/n85237
LUT4        ---     0.493              A to Z              \uart_tx_lf/i74560_3_lut
Route         1   e 0.020                                  \uart_tx_lf/n85308
MUXL5       ---     0.233           BLUT to Z              \uart_tx_lf/i74198
Route         1   e 0.941                                  \uart_tx_lf/uart_out_N_2169
                  --------
                    8.565  (33.6% logic, 66.4% route), 7 logic levels.


Error:  The following path violates requirements by 3.725ns

 Logical Details:  Cell type  Pin type       Cell name  (clock net +/-)

   Source:         FD1P3IX    CK             \uart_tx_lf/i_i0  (from clk_o +)
   Destination:    FD1P3AX    D              \uart_tx_lf/uart_out_40  (to clk_o +)

   Delay:                   8.565ns  (33.6% logic, 66.4% route), 7 logic levels.

 Constraint Details:

      8.565ns data_path \uart_tx_lf/i_i0 to \uart_tx_lf/uart_out_40 violates
      5.000ns delay constraint less
      0.160ns L_S requirement (totaling 4.840ns) by 3.725ns

 Path Details: \uart_tx_lf/i_i0 to \uart_tx_lf/uart_out_40

   Name    Fanout   Delay (ns)          Pins               Resource(Cell.Net)
L_CO        ---     0.444             CK to Q              \uart_tx_lf/i_i0 (from clk_o)
Route        18   e 1.879                                  \uart_tx_lf/i[0]
LUT4        ---     0.493              C to Z              \uart_tx_lf/i74175_3_lut
Route         1   e 0.020                                  \uart_tx_lf/n85287
MUXL5       ---     0.233           BLUT to Z              \uart_tx_lf/i74177
Route         1   e 0.941                                  \uart_tx_lf/n85289
LUT4        ---     0.493              B to Z              \uart_tx_lf/i74124_4_lut
Route         1   e 0.941                                  \uart_tx_lf/n85236
LUT4        ---     0.493              B to Z              \uart_tx_lf/i74535_3_lut
Route         1   e 0.941                                  \uart_tx_lf/n85237
LUT4        ---     0.493              A to Z              \uart_tx_lf/i74560_3_lut
Route         1   e 0.020                                  \uart_tx_lf/n85308
MUXL5       ---     0.233           BLUT to Z              \uart_tx_lf/i74198
Route         1   e 0.941                                  \uart_tx_lf/uart_out_N_2169
                  --------
                    8.565  (33.6% logic, 66.4% route), 7 logic levels.

Warning: 8.725 ns is the maximum delay for this constraint.



================================================================================
Constraint: create_clock -period 5.000000 -name clk3 [get_nets B1_c]
            0 items scored, 0 timing errors detected.
--------------------------------------------------------------------------------


================================================================================
Constraint: create_clock -period 5.000000 -name clk2 [get_nets clk_1ms]
            0 items scored, 0 timing errors detected.
--------------------------------------------------------------------------------


================================================================================
Constraint: create_clock -period 5.000000 -name clk1 [get_nets clk_1mhz]
            0 items scored, 0 timing errors detected.
--------------------------------------------------------------------------------


================================================================================
Constraint: create_clock -period 5.000000 -name clk0 [get_nets clk_c]
            4096 items scored, 4096 timing errors detected.
--------------------------------------------------------------------------------


Error:  The following path violates requirements by 78.821ns

 Logical Details:  Cell type  Pin type       Cell name  (clock net +/-)

   Source:         FD1P3AX    CK             \DS18B20Z_lf/data_out_i0_i15  (from clk_c +)
   Destination:    FD1S3AX    D              \OLED12832_lf/char_i18  (to clk_c +)

   Delay:                  83.661ns  (30.6% logic, 69.4% route), 54 logic levels.

 Constraint Details:

     83.661ns data_path \DS18B20Z_lf/data_out_i0_i15 to \OLED12832_lf/char_i18 violates
      5.000ns delay constraint less
      0.160ns L_S requirement (totaling 4.840ns) by 78.821ns

 Path Details: \DS18B20Z_lf/data_out_i0_i15 to \OLED12832_lf/char_i18

   Name    Fanout   Delay (ns)          Pins               Resource(Cell.Net)
L_CO        ---     0.444             CK to Q              \DS18B20Z_lf/data_out_i0_i15 (from clk_c)
Route         1   e 0.941                                  data_out[15]
LUT4        ---     0.493              B to Z              i2_3_lut
Route         8   e 1.540                                  n8_adj_3562
LUT4        ---     0.493              C to Z              i2_3_lut_rep_1738
Route        38   e 2.049                                  n88625
LUT4        ---     0.493              C to Z              temperature_code_10__I_0_34_i5_3_lut
Route         2   e 1.141                                  temperature_code[4]
A1_TO_FCO   ---     0.827           A[2] to COUT           add_12647_1
Route         1   e 0.020                                  n80348
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12647_3
Route         1   e 0.020                                  n80349
FCI_TO_F    ---     0.598            CIN to S[2]           add_12647_5
Route         1   e 0.020                                  n23041
A1_TO_FCO   ---     0.827           A[2] to COUT           add_12641_3
Route         1   e 0.020                                  n80355
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12641_5
Route         1   e 0.020                                  n80356
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12641_7
Route         1   e 0.020                                  n80357
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12641_9
Route         1   e 0.020                                  n80358
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12641_11
Route         1   e 0.020                                  n80359
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12641_13
Route         1   e 0.020                                  n80360
FCI_TO_F    ---     0.598            CIN to S[2]           add_12641_cout
Route         1   e 0.020                                  n23142
A1_TO_FCO   ---     0.827           A[2] to COUT           add_12642_11
Route         1   e 0.020                                  n80347
FCI_TO_F    ---     0.598            CIN to S[2]           add_12642_cout
Route        11   e 1.977                                  bin_code[20]
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/bin_code[17]_bdd_4_lut_76480
Route         8   e 1.540                                  \bin_to_bcd_lf/bcd_code_24__N_355
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4863_3_lut_4_lut_rep_1859
Route         5   e 1.405                                  \bin_to_bcd_lf/n90728
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7983_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_373
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i8025_3_lut_rep_1561_4_lut_3_lut_4_lut
Route         8   e 1.540                                  n88448
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i1_2_lut_3_lut_4_lut_4_lut
Route         1   e 0.941                                  \bin_to_bcd_lf/n29
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i1_4_lut
Route         7   e 1.502                                  n23
LUT4        ---     0.493              A to Z              i2_4_lut_adj_656
Route         7   e 1.502                                  bcd_code_24__N_382
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4868_3_lut_4_lut
Route         7   e 1.502                                  \bin_to_bcd_lf/n13515
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i8095_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_409
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4870_3_lut_rep_1471_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n88358
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i8151_3_lut_4_lut
Route         9   e 1.574                                  \bin_to_bcd_lf/bcd_code_24__N_436
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4872_3_lut_rep_1433_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n88320
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i8207_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_474
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4875_3_lut_rep_1394_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n88281
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i8263_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_510
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4800_3_lut_rep_1348_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n88235
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i6049_3_lut_4_lut
Route         8   e 1.540                                  \bin_to_bcd_lf/bcd_code_24__N_552
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i6422_3_lut_4_lut_3_lut_4_lut
Route         4   e 1.340                                  \bin_to_bcd_lf/bcd_code_24__N_547
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i5108_2_lut_rep_1249_3_lut
Route         5   e 1.405                                  \bin_to_bcd_lf/n88136
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i4833_3_lut_rep_1235_4_lut
Route         2   e 1.141                                  \bin_to_bcd_lf/n88122
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i6974_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_592
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4839_3_lut_rep_1191_4_lut
Route         2   e 1.141                                  \bin_to_bcd_lf/n88078
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7128_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_643
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4843_3_lut_rep_1150_4_lut
Route         2   e 1.141                                  \bin_to_bcd_lf/n88037
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7335_3_lut_4_lut
Route         8   e 1.540                                  \bin_to_bcd_lf/bcd_code_24__N_694
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i7497_3_lut_4_lut_3_lut_4_lut
Route         5   e 1.405                                  \bin_to_bcd_lf/bcd_code_24__N_689
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i5064_2_lut_rep_1081_3_lut
Route         4   e 1.340                                  \bin_to_bcd_lf/n87968
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i4853_3_lut_rep_1071_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n87958
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7659_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_736
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4857_3_lut_rep_1057_4_lut
Route         2   e 1.141                                  \bin_to_bcd_lf/n87944
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7807_3_lut_4_lut
Route         9   e 1.574                                  \bin_to_bcd_lf/bcd_code_24__N_778
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4859_3_lut_rep_1036_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n87923
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7906_3_lut_rep_1032_4_lut
Route         5   e 1.405                                  n87919
LUT4        ---     0.493              C to Z              \OLED12832_lf/i2_3_lut_4_lut_adj_568
Route         1   e 0.020                                  n84600
MUXL5       ---     0.233           ALUT to Z              i23
Route         1   e 0.941                                  n56
LUT4        ---     0.493              D to Z              i1_4_lut_adj_938
Route         1   e 0.941                                  n18
LUT4        ---     0.493              D to Z              i52697_4_lut
Route         1   e 0.941                                  n63654
LUT4        ---     0.493              D to Z              i1_4_lut_adj_937
Route         1   e 0.941                                  char_167__N_915[18]
                  --------
                   83.661  (30.6% logic, 69.4% route), 54 logic levels.


Error:  The following path violates requirements by 78.821ns

 Logical Details:  Cell type  Pin type       Cell name  (clock net +/-)

   Source:         FD1P3AX    CK             \DS18B20Z_lf/data_out_i0_i15  (from clk_c +)
   Destination:    FD1S3AX    D              \OLED12832_lf/char_i18  (to clk_c +)

   Delay:                  83.661ns  (30.6% logic, 69.4% route), 54 logic levels.

 Constraint Details:

     83.661ns data_path \DS18B20Z_lf/data_out_i0_i15 to \OLED12832_lf/char_i18 violates
      5.000ns delay constraint less
      0.160ns L_S requirement (totaling 4.840ns) by 78.821ns

 Path Details: \DS18B20Z_lf/data_out_i0_i15 to \OLED12832_lf/char_i18

   Name    Fanout   Delay (ns)          Pins               Resource(Cell.Net)
L_CO        ---     0.444             CK to Q              \DS18B20Z_lf/data_out_i0_i15 (from clk_c)
Route         1   e 0.941                                  data_out[15]
LUT4        ---     0.493              B to Z              i2_3_lut
Route         8   e 1.540                                  n8_adj_3562
LUT4        ---     0.493              C to Z              i2_3_lut_rep_1738
Route        38   e 2.049                                  n88625
LUT4        ---     0.493              C to Z              temperature_code_10__I_0_34_i5_3_lut
Route         2   e 1.141                                  temperature_code[4]
A1_TO_FCO   ---     0.827           A[2] to COUT           add_12647_1
Route         1   e 0.020                                  n80348
FCI_TO_F    ---     0.598            CIN to S[2]           add_12647_3
Route         1   e 0.020                                  n23043
A1_TO_FCO   ---     0.827           A[2] to COUT           add_12641_1
Route         1   e 0.020                                  n80354
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12641_3
Route         1   e 0.020                                  n80355
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12641_5
Route         1   e 0.020                                  n80356
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12641_7
Route         1   e 0.020                                  n80357
FCI_TO_F    ---     0.598            CIN to S[2]           add_12641_9
Route         1   e 0.020                                  n23131
A1_TO_FCO   ---     0.827           A[2] to COUT           add_12642_5
Route         1   e 0.020                                  n80344
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12642_7
Route         1   e 0.020                                  n80345
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12642_9
Route         1   e 0.020                                  n80346
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12642_11
Route         1   e 0.020                                  n80347
FCI_TO_F    ---     0.598            CIN to S[2]           add_12642_cout
Route        11   e 1.977                                  bin_code[20]
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/bin_code[17]_bdd_4_lut_76480
Route         8   e 1.540                                  \bin_to_bcd_lf/bcd_code_24__N_355
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4863_3_lut_4_lut_rep_1859
Route         5   e 1.405                                  \bin_to_bcd_lf/n90728
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7983_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_373
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i8025_3_lut_rep_1561_4_lut_3_lut_4_lut
Route         8   e 1.540                                  n88448
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i1_4_lut_4_lut
Route         1   e 0.941                                  \bin_to_bcd_lf/n35
LUT4        ---     0.493              B to Z              \bin_to_bcd_lf/i1_4_lut
Route         7   e 1.502                                  n23
LUT4        ---     0.493              A to Z              i2_4_lut_adj_656
Route         7   e 1.502                                  bcd_code_24__N_382
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4868_3_lut_4_lut
Route         7   e 1.502                                  \bin_to_bcd_lf/n13515
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i8095_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_409
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4870_3_lut_rep_1471_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n88358
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i8151_3_lut_4_lut
Route         9   e 1.574                                  \bin_to_bcd_lf/bcd_code_24__N_436
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4872_3_lut_rep_1433_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n88320
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i8207_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_474
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4875_3_lut_rep_1394_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n88281
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i8263_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_510
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4800_3_lut_rep_1348_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n88235
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i6049_3_lut_4_lut
Route         8   e 1.540                                  \bin_to_bcd_lf/bcd_code_24__N_552
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i6422_3_lut_4_lut_3_lut_4_lut
Route         4   e 1.340                                  \bin_to_bcd_lf/bcd_code_24__N_547
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i5108_2_lut_rep_1249_3_lut
Route         5   e 1.405                                  \bin_to_bcd_lf/n88136
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i4833_3_lut_rep_1235_4_lut
Route         2   e 1.141                                  \bin_to_bcd_lf/n88122
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i6974_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_592
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4839_3_lut_rep_1191_4_lut
Route         2   e 1.141                                  \bin_to_bcd_lf/n88078
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7128_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_643
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4843_3_lut_rep_1150_4_lut
Route         2   e 1.141                                  \bin_to_bcd_lf/n88037
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7335_3_lut_4_lut
Route         8   e 1.540                                  \bin_to_bcd_lf/bcd_code_24__N_694
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i7497_3_lut_4_lut_3_lut_4_lut
Route         5   e 1.405                                  \bin_to_bcd_lf/bcd_code_24__N_689
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i5064_2_lut_rep_1081_3_lut
Route         4   e 1.340                                  \bin_to_bcd_lf/n87968
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i4853_3_lut_rep_1071_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n87958
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7659_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_736
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4857_3_lut_rep_1057_4_lut
Route         2   e 1.141                                  \bin_to_bcd_lf/n87944
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7807_3_lut_4_lut
Route         9   e 1.574                                  \bin_to_bcd_lf/bcd_code_24__N_778
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4859_3_lut_rep_1036_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n87923
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7906_3_lut_rep_1032_4_lut
Route         5   e 1.405                                  n87919
LUT4        ---     0.493              C to Z              \OLED12832_lf/i2_3_lut_4_lut_adj_568
Route         1   e 0.020                                  n84600
MUXL5       ---     0.233           ALUT to Z              i23
Route         1   e 0.941                                  n56
LUT4        ---     0.493              D to Z              i1_4_lut_adj_938
Route         1   e 0.941                                  n18
LUT4        ---     0.493              D to Z              i52697_4_lut
Route         1   e 0.941                                  n63654
LUT4        ---     0.493              D to Z              i1_4_lut_adj_937
Route         1   e 0.941                                  char_167__N_915[18]
                  --------
                   83.661  (30.6% logic, 69.4% route), 54 logic levels.


Error:  The following path violates requirements by 78.821ns

 Logical Details:  Cell type  Pin type       Cell name  (clock net +/-)

   Source:         FD1P3AX    CK             \DS18B20Z_lf/data_out_i0_i15  (from clk_c +)
   Destination:    FD1S3AX    D              \OLED12832_lf/char_i18  (to clk_c +)

   Delay:                  83.661ns  (30.6% logic, 69.4% route), 54 logic levels.

 Constraint Details:

     83.661ns data_path \DS18B20Z_lf/data_out_i0_i15 to \OLED12832_lf/char_i18 violates
      5.000ns delay constraint less
      0.160ns L_S requirement (totaling 4.840ns) by 78.821ns

 Path Details: \DS18B20Z_lf/data_out_i0_i15 to \OLED12832_lf/char_i18

   Name    Fanout   Delay (ns)          Pins               Resource(Cell.Net)
L_CO        ---     0.444             CK to Q              \DS18B20Z_lf/data_out_i0_i15 (from clk_c)
Route         1   e 0.941                                  data_out[15]
LUT4        ---     0.493              B to Z              i2_3_lut
Route         8   e 1.540                                  n8_adj_3562
LUT4        ---     0.493              C to Z              i2_3_lut_rep_1738
Route        38   e 2.049                                  n88625
LUT4        ---     0.493              C to Z              temperature_code_10__I_0_34_i5_3_lut
Route         2   e 1.141                                  temperature_code[4]
A1_TO_FCO   ---     0.827           A[2] to COUT           add_12647_1
Route         1   e 0.020                                  n80348
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12647_3
Route         1   e 0.020                                  n80349
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12647_5
Route         1   e 0.020                                  n80350
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12647_7
Route         1   e 0.020                                  n80351
FCI_TO_F    ---     0.598            CIN to S[2]           add_12647_9
Route         1   e 0.020                                  n23037
A1_TO_FCO   ---     0.827           A[2] to COUT           add_12641_7
Route         1   e 0.020                                  n80357
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12641_9
Route         1   e 0.020                                  n80358
FCI_TO_F    ---     0.598            CIN to S[2]           add_12641_11
Route         1   e 0.020                                  n23130
A1_TO_FCO   ---     0.827           A[2] to COUT           add_12642_7
Route         1   e 0.020                                  n80345
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12642_9
Route         1   e 0.020                                  n80346
FCI_TO_FCO  ---     0.157            CIN to COUT           add_12642_11
Route         1   e 0.020                                  n80347
FCI_TO_F    ---     0.598            CIN to S[2]           add_12642_cout
Route        11   e 1.977                                  bin_code[20]
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/bin_code[17]_bdd_4_lut_76480
Route         8   e 1.540                                  \bin_to_bcd_lf/bcd_code_24__N_355
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4863_3_lut_4_lut_rep_1859
Route         5   e 1.405                                  \bin_to_bcd_lf/n90728
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7983_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_373
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i8025_3_lut_rep_1561_4_lut_3_lut_4_lut
Route         8   e 1.540                                  n88448
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i1_2_lut_3_lut_4_lut_4_lut
Route         1   e 0.941                                  \bin_to_bcd_lf/n29
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i1_4_lut
Route         7   e 1.502                                  n23
LUT4        ---     0.493              A to Z              i2_4_lut_adj_656
Route         7   e 1.502                                  bcd_code_24__N_382
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4868_3_lut_4_lut
Route         7   e 1.502                                  \bin_to_bcd_lf/n13515
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i8095_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_409
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4870_3_lut_rep_1471_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n88358
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i8151_3_lut_4_lut
Route         9   e 1.574                                  \bin_to_bcd_lf/bcd_code_24__N_436
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4872_3_lut_rep_1433_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n88320
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i8207_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_474
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4875_3_lut_rep_1394_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n88281
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i8263_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_510
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4800_3_lut_rep_1348_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n88235
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i6049_3_lut_4_lut
Route         8   e 1.540                                  \bin_to_bcd_lf/bcd_code_24__N_552
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i6422_3_lut_4_lut_3_lut_4_lut
Route         4   e 1.340                                  \bin_to_bcd_lf/bcd_code_24__N_547
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i5108_2_lut_rep_1249_3_lut
Route         5   e 1.405                                  \bin_to_bcd_lf/n88136
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i4833_3_lut_rep_1235_4_lut
Route         2   e 1.141                                  \bin_to_bcd_lf/n88122
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i6974_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_592
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4839_3_lut_rep_1191_4_lut
Route         2   e 1.141                                  \bin_to_bcd_lf/n88078
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7128_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_643
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4843_3_lut_rep_1150_4_lut
Route         2   e 1.141                                  \bin_to_bcd_lf/n88037
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7335_3_lut_4_lut
Route         8   e 1.540                                  \bin_to_bcd_lf/bcd_code_24__N_694
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i7497_3_lut_4_lut_3_lut_4_lut
Route         5   e 1.405                                  \bin_to_bcd_lf/bcd_code_24__N_689
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i5064_2_lut_rep_1081_3_lut
Route         4   e 1.340                                  \bin_to_bcd_lf/n87968
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i4853_3_lut_rep_1071_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n87958
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7659_3_lut_4_lut
Route        10   e 1.604                                  \bin_to_bcd_lf/bcd_code_24__N_736
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4857_3_lut_rep_1057_4_lut
Route         2   e 1.141                                  \bin_to_bcd_lf/n87944
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7807_3_lut_4_lut
Route         9   e 1.574                                  \bin_to_bcd_lf/bcd_code_24__N_778
LUT4        ---     0.493              C to Z              \bin_to_bcd_lf/i4859_3_lut_rep_1036_4_lut
Route         3   e 1.258                                  \bin_to_bcd_lf/n87923
LUT4        ---     0.493              D to Z              \bin_to_bcd_lf/i7906_3_lut_rep_1032_4_lut
Route         5   e 1.405                                  n87919
LUT4        ---     0.493              C to Z              \OLED12832_lf/i2_3_lut_4_lut_adj_568
Route         1   e 0.020                                  n84600
MUXL5       ---     0.233           ALUT to Z              i23
Route         1   e 0.941                                  n56
LUT4        ---     0.493              D to Z              i1_4_lut_adj_938
Route         1   e 0.941                                  n18
LUT4        ---     0.493              D to Z              i52697_4_lut
Route         1   e 0.941                                  n63654
LUT4        ---     0.493              D to Z              i1_4_lut_adj_937
Route         1   e 0.941                                  char_167__N_915[18]
                  --------
                   83.661  (30.6% logic, 69.4% route), 54 logic levels.

Warning: 83.821 ns is the maximum delay for this constraint.


Timing Report Summary
--------------
--------------------------------------------------------------------------------
Constraint                              |   Constraint|       Actual|Levels
--------------------------------------------------------------------------------
                                        |             |             |
create_clock -period 5.000000 -name     |             |             |
clk5 [get_nets uart_en]                 |     5.000 ns|     3.436 ns|     2  
                                        |             |             |
create_clock -period 5.000000 -name     |             |             |
clk4 [get_nets clk_o]                   |     5.000 ns|     8.725 ns|     7 *
                                        |             |             |
create_clock -period 5.000000 -name     |             |             |
clk3 [get_nets B1_c]                    |            -|            -|     0  
                                        |             |             |
create_clock -period 5.000000 -name     |             |             |
clk2 [get_nets clk_1ms]                 |            -|            -|     0  
                                        |             |             |
create_clock -period 5.000000 -name     |             |             |
clk1 [get_nets clk_1mhz]                |            -|            -|     0  
                                        |             |             |
create_clock -period 5.000000 -name     |             |             |
clk0 [get_nets clk_c]                   |     5.000 ns|    83.821 ns|    54 *
                                        |             |             |
--------------------------------------------------------------------------------


2 constraints not met.

--------------------------------------------------------------------------------
Critical Nets                           |   Loads|  Errors| % of total
--------------------------------------------------------------------------------
\bin_to_bcd_lf/bcd_code_24__N_547       |       4|    4096|     97.90%
                                        |        |        |
\bin_to_bcd_lf/bcd_code_24__N_592       |      10|    4096|     97.90%
                                        |        |        |
\bin_to_bcd_lf/bcd_code_24__N_689       |       5|    4096|     97.90%
                                        |        |        |
\bin_to_bcd_lf/n87923                   |       3|    4096|     97.90%
                                        |        |        |
\bin_to_bcd_lf/n87958                   |       3|    4096|     97.90%
                                        |        |        |
\bin_to_bcd_lf/n87968                   |       4|    4096|     97.90%
                                        |        |        |
\bin_to_bcd_lf/n88122                   |       2|    4096|     97.90%
                                        |        |        |
\bin_to_bcd_lf/n88136                   |       5|    4096|     97.90%
                                        |        |        |
\bin_to_bcd_lf/n88235                   |       3|    4096|     97.90%
                                        |        |        |
\bin_to_bcd_lf/n88281                   |       3|    4096|     97.90%
                                        |        |        |
\bin_to_bcd_lf/n88320                   |       3|    4096|     97.90%
                                        |        |        |
\bin_to_bcd_lf/n90728                   |       5|    4096|     97.90%
                                        |        |        |
char_167__N_915[18]                     |       1|    4096|     97.90%
                                        |        |        |
n8_adj_3562                             |       8|    4096|     97.90%
                                        |        |        |
n18                                     |       1|    4096|     97.90%
                                        |        |        |
n56                                     |       1|    4096|     97.90%
                                        |        |        |
n63654                                  |       1|    4096|     97.90%
                                        |        |        |
n84600                                  |       1|    4096|     97.90%
                                        |        |        |
n87919                                  |       5|    4096|     97.90%
                                        |        |        |
n88625                                  |      38|    4096|     97.90%
                                        |        |        |
\bin_to_bcd_lf/bcd_code_24__N_436       |       9|    3964|     94.74%
                                        |        |        |
\bin_to_bcd_lf/n88358                   |       3|    3964|     94.74%
                                        |        |        |
bin_code[20]                            |      11|    3912|     93.50%
                                        |        |        |
n80347                                  |       1|    3912|     93.50%
                                        |        |        |
\bin_to_bcd_lf/bcd_code_24__N_355       |       8|    3832|     91.59%
                                        |        |        |
\bin_to_bcd_lf/bcd_code_24__N_373       |      10|    3832|     91.59%
                                        |        |        |
\bin_to_bcd_lf/bcd_code_24__N_474       |      10|    3832|     91.59%
                                        |        |        |
\bin_to_bcd_lf/bcd_code_24__N_510       |      10|    3832|     91.59%
                                        |        |        |
\bin_to_bcd_lf/bcd_code_24__N_552       |       8|    3832|     91.59%
                                        |        |        |
\bin_to_bcd_lf/bcd_code_24__N_643       |      10|    3832|     91.59%
                                        |        |        |
\bin_to_bcd_lf/bcd_code_24__N_694       |       8|    3832|     91.59%
                                        |        |        |
\bin_to_bcd_lf/bcd_code_24__N_736       |      10|    3832|     91.59%
                                        |        |        |
\bin_to_bcd_lf/n88037                   |       2|    3832|     91.59%
                                        |        |        |
\bin_to_bcd_lf/n88078                   |       2|    3832|     91.59%
                                        |        |        |
\bin_to_bcd_lf/bcd_code_24__N_778       |       9|    3700|     88.43%
                                        |        |        |
\bin_to_bcd_lf/n13515                   |       7|    3700|     88.43%
                                        |        |        |
\bin_to_bcd_lf/n87944                   |       2|    3700|     88.43%
                                        |        |        |
bcd_code_24__N_382                      |       7|    3700|     88.43%
                                        |        |        |
n23                                     |       7|    3700|     88.43%
                                        |        |        |
n88448                                  |       8|    3700|     88.43%
                                        |        |        |
n80348                                  |       1|    3688|     88.15%
                                        |        |        |
temperature_code[4]                     |       2|    3688|     88.15%
                                        |        |        |
n80346                                  |       1|    3556|     84.99%
                                        |        |        |
\bin_to_bcd_lf/bcd_code_24__N_409       |      10|    3436|     82.12%
                                        |        |        |
n80349                                  |       1|    3239|     77.41%
                                        |        |        |
n80357                                  |       1|    2588|     61.85%
                                        |        |        |
n80356                                  |       1|    2465|     58.91%
                                        |        |        |
n80345                                  |       1|    2418|     57.79%
                                        |        |        |
n80358                                  |       1|    2323|     55.52%
                                        |        |        |
n80350                                  |       1|    2268|     54.21%
                                        |        |        |
\bin_to_bcd_lf/n29                      |       1|    1907|     45.58%
                                        |        |        |
\bin_to_bcd_lf/n35                      |       1|    1793|     42.85%
                                        |        |        |
n80355                                  |       1|    1774|     42.40%
                                        |        |        |
n80359                                  |       1|    1678|     40.11%
                                        |        |        |
n80344                                  |       1|    1480|     35.37%
                                        |        |        |
n80351                                  |       1|    1407|     33.63%
                                        |        |        |
data_out[11]                            |       1|    1384|     33.08%
                                        |        |        |
data_out[15]                            |       1|    1368|     32.70%
                                        |        |        |
data_out[13]                            |       1|    1344|     32.12%
                                        |        |        |
n23041                                  |       1|     917|     21.92%
                                        |        |        |
n23039                                  |       1|     819|     19.57%
                                        |        |        |
n23043                                  |       1|     797|     19.05%
                                        |        |        |
n80354                                  |       1|     797|     19.05%
                                        |        |        |
n80352                                  |       1|     744|     17.78%
                                        |        |        |
n80343                                  |       1|     734|     17.54%
                                        |        |        |
n23037                                  |       1|     633|     15.13%
                                        |        |        |
n23128                                  |       1|     578|     13.81%
                                        |        |        |
n23127                                  |       1|     560|     13.38%
                                        |        |        |
n23142                                  |       1|     540|     12.91%
                                        |        |        |
n80360                                  |       1|     540|     12.91%
                                        |        |        |
\bin_to_bcd_lf/n88369                   |       5|     528|     12.62%
                                        |        |        |
n23130                                  |       1|     476|     11.38%
                                        |        |        |
n23129                                  |       1|     462|     11.04%
                                        |        |        |
n23035                                  |       1|     451|     10.78%
                                        |        |        |
--------------------------------------------------------------------------------


Timing summary:
---------------

Timing errors: 4184  Score: 322300589

Constraints cover >4294967295 paths, 4753 nets, and 15546 connections (97.0% coverage)


Peak memory: 255471616 bytes, TRCE: 31469568 bytes, DLYMAN: 1310720 bytes
CPU_TIME_REPORT: 0 secs