Place & Route TRACE Report

Loading design for application trce from file lf_project_impl1.ncd.
Design name: lf_project
NCD version: 3.3
Vendor:      LATTICE
Device:      LCMXO2-4000HC
Package:     CSBGA132
Performance: 4
Loading device for application trce from file 'xo2c4000.nph' in environment: D:/diamond/diamond/3.11_x64/ispfpga.
Package Status:                     Final          Version 1.44.
Performance Hardware Data Status:   Final          Version 34.4.
Setup and Hold Report

--------------------------------------------------------------------------------
Lattice TRACE Report - Setup, Version Diamond (64-bit) 3.11.0.396.4
Tue Feb 23 11:27:09 2021

Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp.   All rights reserved.
Copyright (c) 1995-2001 Lucent Technologies Inc.  All rights reserved.
Copyright (c) 2001 Agere Systems   All rights reserved.
Copyright (c) 2002-2019 Lattice Semiconductor Corporation,  All rights reserved.

Report Information
------------------
Command line:    trce -v 10 -gt -sethld -sp 4 -sphld m -o lf_project_impl1.twr -gui -msgset C:/Users/17152/Desktop/lf_project - 1.0/promote.xml lf_project_impl1.ncd lf_project_impl1.prf 
Design file:     lf_project_impl1.ncd
Preference file: lf_project_impl1.prf
Device,speed:    LCMXO2-4000HC,4
Report level:    verbose report, limited to 10 items per preference
--------------------------------------------------------------------------------

Preference Summary

  • FREQUENCY 8.000000 MHz (0 errors)
  • 4096 items scored, 0 timing errors detected. Report: 11.821MHz is the maximum frequency for this preference. BLOCK ASYNCPATHS BLOCK RESETPATHS -------------------------------------------------------------------------------- Derating parameters ------------------- Voltage: 3.300 V ================================================================================ Preference: FREQUENCY 8.000000 MHz ; 4096 items scored, 0 timing errors detected. -------------------------------------------------------------------------------- Passed: The following path meets requirements by 40.402ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q DS18B20Z_lf/data_out_i0_i8 (from clk_c +) Destination: FF Data in OLED12832_lf/char_i32 (to clk_c +) Delay: 84.432ns (29.1% logic, 70.9% route), 46 logic levels. Constraint Details: 84.432ns physical path delay SLICE_984 to OLED12832_lf/SLICE_296 meets 125.000ns delay constraint less 0.000ns skew and 0.166ns DIN_SET requirement (totaling 124.834ns) by 40.402ns Physical Path Details: Data path SLICE_984 to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.452 R3C10D.CLK to R3C10D.Q0 SLICE_984 (from clk_c) ROUTE 5 4.490 R3C10D.Q0 to R12C31A.B1 data_out_8 C1TOFCO_DE --- 0.889 R12C31A.B1 to R12C31A.FCO SLICE_37 ROUTE 1 0.000 R12C31A.FCO to R12C31B.FCI n80262 FCITOF0_DE --- 0.585 R12C31B.FCI to R12C31B.F0 SLICE_12 ROUTE 4 1.896 R12C31B.F0 to R13C29C.B0 temperature_code_10_N_12_9 CTOF_DEL --- 0.495 R13C29C.B0 to R13C29C.F0 SLICE_1650 ROUTE 2 1.846 R13C29C.F0 to R13C30D.B0 temperature_code_9 C0TOFCO_DE --- 1.023 R13C30D.B0 to R13C30D.FCO SLICE_11 ROUTE 1 0.000 R13C30D.FCO to R13C31A.FCI n80351 FCITOF0_DE --- 0.585 R13C31A.FCI to R13C31A.F0 SLICE_10 ROUTE 1 1.299 R13C31A.F0 to R15C30D.A1 n23037 C1TOFCO_DE --- 0.889 R15C30D.A1 to R15C30D.FCO SLICE_4 ROUTE 1 0.000 R15C30D.FCO to R15C31A.FCI n80357 FCITOF0_DE --- 0.585 R15C31A.FCI to R15C31A.F0 SLICE_3 ROUTE 1 1.962 R15C31A.F0 to R16C30C.B0 n23132 C0TOFCO_DE --- 1.023 R16C30C.B0 to R16C30C.FCO SLICE_20 ROUTE 1 0.000 R16C30C.FCO to R16C30D.FCI n80344 FCITOFCO_D --- 0.162 R16C30D.FCI to R16C30D.FCO SLICE_19 ROUTE 1 0.000 R16C30D.FCO to R16C31A.FCI n80345 FCITOFCO_D --- 0.162 R16C31A.FCI to R16C31A.FCO SLICE_18 ROUTE 1 0.000 R16C31A.FCO to R16C31B.FCI n80346 FCITOF1_DE --- 0.643 R16C31B.FCI to R16C31B.F1 SLICE_17 ROUTE 10 1.910 R16C31B.F1 to R17C30A.B0 bin_code_19 CTOF_DEL --- 0.495 R17C30A.B0 to R17C30A.F0 bin_to_bcd_lf/SLICE_2024 ROUTE 8 1.016 R17C30A.F0 to R17C30C.A1 bin_to_bcd_lf/bcd_code_24__N_355 CTOF_DEL --- 0.495 R17C30C.A1 to R17C30C.F1 bin_to_bcd_lf/SLICE_1431 ROUTE 5 1.459 R17C30C.F1 to R17C29A.B1 bin_to_bcd_lf/n90728 CTOF_DEL --- 0.495 R17C29A.B1 to R17C29A.F1 bin_to_bcd_lf/SLICE_2045 ROUTE 10 1.901 R17C29A.F1 to R16C29A.B1 bin_to_bcd_lf/bcd_code_24__N_373 CTOF_DEL --- 0.495 R16C29A.B1 to R16C29A.F1 bin_to_bcd_lf/SLICE_2033 ROUTE 3 1.359 R16C29A.F1 to R17C28A.B1 bin_to_bcd_lf/n88461 CTOF_DEL --- 0.495 R17C28A.B1 to R17C28A.F1 bin_to_bcd_lf/SLICE_2018 ROUTE 10 1.367 R17C28A.F1 to R16C29B.A0 bin_to_bcd_lf/bcd_code_24__N_391 CTOF_DEL --- 0.495 R16C29B.A0 to R16C29B.F0 bin_to_bcd_lf/SLICE_1617 ROUTE 3 0.445 R16C29B.F0 to R16C29A.C0 bin_to_bcd_lf/n88437 CTOF_DEL --- 0.495 R16C29A.C0 to R16C29A.F0 bin_to_bcd_lf/SLICE_2033 ROUTE 9 1.902 R16C29A.F0 to R17C28C.B1 bin_to_bcd_lf/bcd_code_24__N_418 CTOF_DEL --- 0.495 R17C28C.B1 to R17C28C.F1 bin_to_bcd_lf/SLICE_2013 ROUTE 5 1.405 R17C28C.F1 to R18C26D.D0 bin_to_bcd_lf/bcd_code_24__N_413 CTOF_DEL --- 0.495 R18C26D.D0 to R18C26D.F0 bin_to_bcd_lf/SLICE_2355 ROUTE 5 1.841 R18C26D.F0 to R17C24B.D1 bin_to_bcd_lf/n88369 CTOF_DEL --- 0.495 R17C24B.D1 to R17C24B.F1 bin_to_bcd_lf/SLICE_2097 ROUTE 3 0.453 R17C24B.F1 to R17C24B.C0 bin_to_bcd_lf/n88358 CTOF_DEL --- 0.495 R17C24B.C0 to R17C24B.F0 bin_to_bcd_lf/SLICE_2097 ROUTE 4 1.000 R17C24B.F0 to R17C25B.A1 bin_to_bcd_lf/n88333 CTOF_DEL --- 0.495 R17C25B.A1 to R17C25B.F1 bin_to_bcd_lf/SLICE_2084 ROUTE 3 1.040 R17C25B.F1 to R17C24C.B1 bin_to_bcd_lf/n88320 CTOF_DEL --- 0.495 R17C24C.B1 to R17C24C.F1 bin_to_bcd_lf/SLICE_2003 ROUTE 10 1.905 R17C24C.F1 to R16C25A.A1 bin_to_bcd_lf/bcd_code_24__N_474 CTOF_DEL --- 0.495 R16C25A.A1 to R16C25A.F1 bin_to_bcd_lf/SLICE_2088 ROUTE 5 1.361 R16C25A.F1 to R15C24B.B0 bin_to_bcd_lf/n88231 CTOF_DEL --- 0.495 R15C24B.B0 to R15C24B.F0 bin_to_bcd_lf/SLICE_1634 ROUTE 2 1.010 R15C24B.F0 to R15C23C.B0 bin_to_bcd_lf/n88212 CTOF_DEL --- 0.495 R15C23C.B0 to R15C23C.F0 bin_to_bcd_lf/SLICE_1636 ROUTE 9 1.574 R15C23C.F0 to R16C25B.C0 bin_to_bcd_lf/bcd_code_24__N_501 CTOF_DEL --- 0.495 R16C25B.C0 to R16C25B.F0 bin_to_bcd_lf/SLICE_2082 ROUTE 3 0.758 R16C25B.F0 to R15C25B.C1 bin_to_bcd_lf/n88166 CTOF_DEL --- 0.495 R15C25B.C1 to R15C25B.F1 bin_to_bcd_lf/SLICE_2050 ROUTE 10 1.839 R15C25B.F1 to R16C26D.B0 bin_to_bcd_lf/bcd_code_24__N_543 CTOF_DEL --- 0.495 R16C26D.B0 to R16C26D.F0 bin_to_bcd_lf/SLICE_2058 ROUTE 2 0.993 R16C26D.F0 to R17C26B.A0 bin_to_bcd_lf/n88109 CTOF_DEL --- 0.495 R17C26B.A0 to R17C26B.F0 bin_to_bcd_lf/SLICE_2063 ROUTE 5 2.352 R17C26B.F0 to R13C25D.D0 bin_to_bcd_lf/n88094 CTOF_DEL --- 0.495 R13C25D.D0 to R13C25D.F0 bin_to_bcd_lf/SLICE_2020 ROUTE 4 0.995 R13C25D.F0 to R12C25C.A1 bin_to_bcd_lf/n88036 CTOF_DEL --- 0.495 R12C25C.A1 to R12C25C.F1 bin_to_bcd_lf/SLICE_2085 ROUTE 2 0.995 R12C25C.F1 to R14C25A.A1 bin_to_bcd_lf/n88023 CTOF_DEL --- 0.495 R14C25A.A1 to R14C25A.F1 bin_to_bcd_lf/SLICE_2032 ROUTE 10 1.958 R14C25A.F1 to R9C25C.D1 bin_to_bcd_lf/bcd_code_24__N_634 CTOF_DEL --- 0.495 R9C25C.D1 to R9C25C.F1 bin_to_bcd_lf/SLICE_2053 ROUTE 3 1.542 R9C25C.F1 to R12C25C.A0 bin_to_bcd_lf/n87987 CTOF_DEL --- 0.495 R12C25C.A0 to R12C25C.F0 bin_to_bcd_lf/SLICE_2085 ROUTE 9 2.420 R12C25C.F0 to R9C25B.A0 bin_to_bcd_lf/bcd_code_24__N_685 CTOF_DEL --- 0.495 R9C25B.A0 to R9C25B.F0 bin_to_bcd_lf/SLICE_1622 ROUTE 3 1.028 R9C25B.F0 to R8C25B.B0 bin_to_bcd_lf/n87958 CTOF_DEL --- 0.495 R8C25B.B0 to R8C25B.F0 bin_to_bcd_lf/SLICE_2054 ROUTE 10 1.472 R8C25B.F0 to R10C24D.A1 bin_to_bcd_lf/bcd_code_24__N_736 CTOF_DEL --- 0.495 R10C24D.A1 to R10C24D.F1 bin_to_bcd_lf/SLICE_2036 ROUTE 2 1.534 R10C24D.F1 to R12C26B.A1 bin_to_bcd_lf/n87938 CTOF_DEL --- 0.495 R12C26B.A1 to R12C26B.F1 bin_to_bcd_lf/SLICE_2025 ROUTE 7 2.191 R12C26B.F1 to R8C24B.C1 bin_to_bcd_lf/n87934 CTOF_DEL --- 0.495 R8C24B.C1 to R8C24B.F1 bin_to_bcd_lf/SLICE_2113 ROUTE 1 1.450 R8C24B.F1 to R9C22A.B1 bcd_code_16 CTOOFX_DEL --- 0.721 R9C22A.B1 to R9C22A.OFX0 OLED12832_lf/i37_adj_422/SLICE_1200 ROUTE 1 2.713 R9C22A.OFX0 to R15C19D.A1 OLED12832_lf/n17_adj_3361 CTOF_DEL --- 0.495 R15C19D.A1 to R15C19D.F1 SLICE_1529 ROUTE 1 0.436 R15C19D.F1 to R15C19D.C0 OLED12832_lf/char_167_N_1296_32 CTOF_DEL --- 0.495 R15C19D.C0 to R15C19D.F0 SLICE_1529 ROUTE 1 0.766 R15C19D.F0 to R13C19D.C1 OLED12832_lf/n16_adj_3358 CTOF_DEL --- 0.495 R13C19D.C1 to R13C19D.F1 OLED12832_lf/SLICE_296 ROUTE 1 0.000 R13C19D.F1 to R13C19D.DI1 OLED12832_lf/char_167_N_915_32 (to clk_c) -------- 84.432 (29.1% logic, 70.9% route), 46 logic levels. Clock Skew Details: Source Clock Path clk to SLICE_984: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R3C10D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Destination Clock Path clk to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R13C19D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Passed: The following path meets requirements by 40.414ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q DS18B20Z_lf/data_out_i0_i11 (from clk_c +) Destination: FF Data in OLED12832_lf/char_i32 (to clk_c +) Delay: 84.420ns (28.8% logic, 71.2% route), 47 logic levels. Constraint Details: 84.420ns physical path delay SLICE_985 to OLED12832_lf/SLICE_296 meets 125.000ns delay constraint less 0.000ns skew and 0.166ns DIN_SET requirement (totaling 124.834ns) by 40.414ns Physical Path Details: Data path SLICE_985 to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.452 R7C6D.CLK to R7C6D.Q1 SLICE_985 (from clk_c) ROUTE 1 2.180 R7C6D.Q1 to R13C17D.D0 data_out_11 CTOF_DEL --- 0.495 R13C17D.D0 to R13C17D.F0 SLICE_1684 ROUTE 8 2.967 R13C17D.F0 to R13C29C.A1 n8_adj_3562 CTOF_DEL --- 0.495 R13C29C.A1 to R13C29C.F1 SLICE_1650 ROUTE 38 1.872 R13C29C.F1 to R14C31D.A1 n88625 CTOF_DEL --- 0.495 R14C31D.A1 to R14C31D.F1 SLICE_2319 ROUTE 1 1.001 R14C31D.F1 to R14C30A.B1 temperature_code_1 C1TOFCO_DE --- 0.889 R14C30A.B1 to R14C30A.FCO SLICE_107 ROUTE 1 0.000 R14C30A.FCO to R14C30B.FCI n80436 FCITOF1_DE --- 0.643 R14C30B.FCI to R14C30B.F1 SLICE_106 ROUTE 1 1.763 R14C30B.F1 to R15C30C.B0 n22980 C0TOFCO_DE --- 1.023 R15C30C.B0 to R15C30C.FCO SLICE_5 ROUTE 1 0.000 R15C30C.FCO to R15C30D.FCI n80356 FCITOFCO_D --- 0.162 R15C30D.FCI to R15C30D.FCO SLICE_4 ROUTE 1 0.000 R15C30D.FCO to R15C31A.FCI n80357 FCITOF0_DE --- 0.585 R15C31A.FCI to R15C31A.F0 SLICE_3 ROUTE 1 1.962 R15C31A.F0 to R16C30C.B0 n23132 C0TOFCO_DE --- 1.023 R16C30C.B0 to R16C30C.FCO SLICE_20 ROUTE 1 0.000 R16C30C.FCO to R16C30D.FCI n80344 FCITOFCO_D --- 0.162 R16C30D.FCI to R16C30D.FCO SLICE_19 ROUTE 1 0.000 R16C30D.FCO to R16C31A.FCI n80345 FCITOFCO_D --- 0.162 R16C31A.FCI to R16C31A.FCO SLICE_18 ROUTE 1 0.000 R16C31A.FCO to R16C31B.FCI n80346 FCITOF1_DE --- 0.643 R16C31B.FCI to R16C31B.F1 SLICE_17 ROUTE 10 1.910 R16C31B.F1 to R17C30A.B0 bin_code_19 CTOF_DEL --- 0.495 R17C30A.B0 to R17C30A.F0 bin_to_bcd_lf/SLICE_2024 ROUTE 8 1.016 R17C30A.F0 to R17C30C.A1 bin_to_bcd_lf/bcd_code_24__N_355 CTOF_DEL --- 0.495 R17C30C.A1 to R17C30C.F1 bin_to_bcd_lf/SLICE_1431 ROUTE 5 1.459 R17C30C.F1 to R17C29A.B1 bin_to_bcd_lf/n90728 CTOF_DEL --- 0.495 R17C29A.B1 to R17C29A.F1 bin_to_bcd_lf/SLICE_2045 ROUTE 10 1.901 R17C29A.F1 to R16C29A.B1 bin_to_bcd_lf/bcd_code_24__N_373 CTOF_DEL --- 0.495 R16C29A.B1 to R16C29A.F1 bin_to_bcd_lf/SLICE_2033 ROUTE 3 1.359 R16C29A.F1 to R17C28A.B1 bin_to_bcd_lf/n88461 CTOF_DEL --- 0.495 R17C28A.B1 to R17C28A.F1 bin_to_bcd_lf/SLICE_2018 ROUTE 10 1.367 R17C28A.F1 to R16C29B.A0 bin_to_bcd_lf/bcd_code_24__N_391 CTOF_DEL --- 0.495 R16C29B.A0 to R16C29B.F0 bin_to_bcd_lf/SLICE_1617 ROUTE 3 0.445 R16C29B.F0 to R16C29A.C0 bin_to_bcd_lf/n88437 CTOF_DEL --- 0.495 R16C29A.C0 to R16C29A.F0 bin_to_bcd_lf/SLICE_2033 ROUTE 9 1.902 R16C29A.F0 to R17C28C.B1 bin_to_bcd_lf/bcd_code_24__N_418 CTOF_DEL --- 0.495 R17C28C.B1 to R17C28C.F1 bin_to_bcd_lf/SLICE_2013 ROUTE 5 1.405 R17C28C.F1 to R18C26D.D0 bin_to_bcd_lf/bcd_code_24__N_413 CTOF_DEL --- 0.495 R18C26D.D0 to R18C26D.F0 bin_to_bcd_lf/SLICE_2355 ROUTE 5 1.841 R18C26D.F0 to R17C24B.D1 bin_to_bcd_lf/n88369 CTOF_DEL --- 0.495 R17C24B.D1 to R17C24B.F1 bin_to_bcd_lf/SLICE_2097 ROUTE 3 0.453 R17C24B.F1 to R17C24B.C0 bin_to_bcd_lf/n88358 CTOF_DEL --- 0.495 R17C24B.C0 to R17C24B.F0 bin_to_bcd_lf/SLICE_2097 ROUTE 4 1.000 R17C24B.F0 to R17C25B.A1 bin_to_bcd_lf/n88333 CTOF_DEL --- 0.495 R17C25B.A1 to R17C25B.F1 bin_to_bcd_lf/SLICE_2084 ROUTE 3 1.040 R17C25B.F1 to R17C24C.B1 bin_to_bcd_lf/n88320 CTOF_DEL --- 0.495 R17C24C.B1 to R17C24C.F1 bin_to_bcd_lf/SLICE_2003 ROUTE 10 1.905 R17C24C.F1 to R16C25A.A1 bin_to_bcd_lf/bcd_code_24__N_474 CTOF_DEL --- 0.495 R16C25A.A1 to R16C25A.F1 bin_to_bcd_lf/SLICE_2088 ROUTE 5 1.361 R16C25A.F1 to R15C24B.B0 bin_to_bcd_lf/n88231 CTOF_DEL --- 0.495 R15C24B.B0 to R15C24B.F0 bin_to_bcd_lf/SLICE_1634 ROUTE 2 1.010 R15C24B.F0 to R15C23C.B0 bin_to_bcd_lf/n88212 CTOF_DEL --- 0.495 R15C23C.B0 to R15C23C.F0 bin_to_bcd_lf/SLICE_1636 ROUTE 9 1.574 R15C23C.F0 to R16C25B.C0 bin_to_bcd_lf/bcd_code_24__N_501 CTOF_DEL --- 0.495 R16C25B.C0 to R16C25B.F0 bin_to_bcd_lf/SLICE_2082 ROUTE 3 0.758 R16C25B.F0 to R15C25B.C1 bin_to_bcd_lf/n88166 CTOF_DEL --- 0.495 R15C25B.C1 to R15C25B.F1 bin_to_bcd_lf/SLICE_2050 ROUTE 10 1.839 R15C25B.F1 to R16C26D.B0 bin_to_bcd_lf/bcd_code_24__N_543 CTOF_DEL --- 0.495 R16C26D.B0 to R16C26D.F0 bin_to_bcd_lf/SLICE_2058 ROUTE 2 0.993 R16C26D.F0 to R17C26B.A0 bin_to_bcd_lf/n88109 CTOF_DEL --- 0.495 R17C26B.A0 to R17C26B.F0 bin_to_bcd_lf/SLICE_2063 ROUTE 5 2.352 R17C26B.F0 to R13C25D.D0 bin_to_bcd_lf/n88094 CTOF_DEL --- 0.495 R13C25D.D0 to R13C25D.F0 bin_to_bcd_lf/SLICE_2020 ROUTE 4 0.995 R13C25D.F0 to R12C25C.A1 bin_to_bcd_lf/n88036 CTOF_DEL --- 0.495 R12C25C.A1 to R12C25C.F1 bin_to_bcd_lf/SLICE_2085 ROUTE 2 0.995 R12C25C.F1 to R14C25A.A1 bin_to_bcd_lf/n88023 CTOF_DEL --- 0.495 R14C25A.A1 to R14C25A.F1 bin_to_bcd_lf/SLICE_2032 ROUTE 10 1.958 R14C25A.F1 to R9C25C.D1 bin_to_bcd_lf/bcd_code_24__N_634 CTOF_DEL --- 0.495 R9C25C.D1 to R9C25C.F1 bin_to_bcd_lf/SLICE_2053 ROUTE 3 1.542 R9C25C.F1 to R12C25C.A0 bin_to_bcd_lf/n87987 CTOF_DEL --- 0.495 R12C25C.A0 to R12C25C.F0 bin_to_bcd_lf/SLICE_2085 ROUTE 9 2.420 R12C25C.F0 to R9C25B.A0 bin_to_bcd_lf/bcd_code_24__N_685 CTOF_DEL --- 0.495 R9C25B.A0 to R9C25B.F0 bin_to_bcd_lf/SLICE_1622 ROUTE 3 1.028 R9C25B.F0 to R8C25B.B0 bin_to_bcd_lf/n87958 CTOF_DEL --- 0.495 R8C25B.B0 to R8C25B.F0 bin_to_bcd_lf/SLICE_2054 ROUTE 10 1.472 R8C25B.F0 to R10C24D.A1 bin_to_bcd_lf/bcd_code_24__N_736 CTOF_DEL --- 0.495 R10C24D.A1 to R10C24D.F1 bin_to_bcd_lf/SLICE_2036 ROUTE 2 1.534 R10C24D.F1 to R12C26B.A1 bin_to_bcd_lf/n87938 CTOF_DEL --- 0.495 R12C26B.A1 to R12C26B.F1 bin_to_bcd_lf/SLICE_2025 ROUTE 7 2.191 R12C26B.F1 to R8C24B.C1 bin_to_bcd_lf/n87934 CTOF_DEL --- 0.495 R8C24B.C1 to R8C24B.F1 bin_to_bcd_lf/SLICE_2113 ROUTE 1 1.450 R8C24B.F1 to R9C22A.B1 bcd_code_16 CTOOFX_DEL --- 0.721 R9C22A.B1 to R9C22A.OFX0 OLED12832_lf/i37_adj_422/SLICE_1200 ROUTE 1 2.713 R9C22A.OFX0 to R15C19D.A1 OLED12832_lf/n17_adj_3361 CTOF_DEL --- 0.495 R15C19D.A1 to R15C19D.F1 SLICE_1529 ROUTE 1 0.436 R15C19D.F1 to R15C19D.C0 OLED12832_lf/char_167_N_1296_32 CTOF_DEL --- 0.495 R15C19D.C0 to R15C19D.F0 SLICE_1529 ROUTE 1 0.766 R15C19D.F0 to R13C19D.C1 OLED12832_lf/n16_adj_3358 CTOF_DEL --- 0.495 R13C19D.C1 to R13C19D.F1 OLED12832_lf/SLICE_296 ROUTE 1 0.000 R13C19D.F1 to R13C19D.DI1 OLED12832_lf/char_167_N_915_32 (to clk_c) -------- 84.420 (28.8% logic, 71.2% route), 47 logic levels. Clock Skew Details: Source Clock Path clk to SLICE_985: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R7C6D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Destination Clock Path clk to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R13C19D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Passed: The following path meets requirements by 40.419ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q DS18B20Z_lf/data_out_i0_i8 (from clk_c +) Destination: FF Data in OLED12832_lf/char_i32 (to clk_c +) Delay: 84.415ns (29.1% logic, 70.9% route), 46 logic levels. Constraint Details: 84.415ns physical path delay SLICE_984 to OLED12832_lf/SLICE_296 meets 125.000ns delay constraint less 0.000ns skew and 0.166ns DIN_SET requirement (totaling 124.834ns) by 40.419ns Physical Path Details: Data path SLICE_984 to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.452 R3C10D.CLK to R3C10D.Q0 SLICE_984 (from clk_c) ROUTE 5 4.490 R3C10D.Q0 to R12C31A.B1 data_out_8 C1TOFCO_DE --- 0.889 R12C31A.B1 to R12C31A.FCO SLICE_37 ROUTE 1 0.000 R12C31A.FCO to R12C31B.FCI n80262 FCITOF0_DE --- 0.585 R12C31B.FCI to R12C31B.F0 SLICE_12 ROUTE 4 1.896 R12C31B.F0 to R13C29C.B0 temperature_code_10_N_12_9 CTOF_DEL --- 0.495 R13C29C.B0 to R13C29C.F0 SLICE_1650 ROUTE 2 1.846 R13C29C.F0 to R13C30D.B0 temperature_code_9 C0TOFCO_DE --- 1.023 R13C30D.B0 to R13C30D.FCO SLICE_11 ROUTE 1 0.000 R13C30D.FCO to R13C31A.FCI n80351 FCITOF0_DE --- 0.585 R13C31A.FCI to R13C31A.F0 SLICE_10 ROUTE 1 1.299 R13C31A.F0 to R15C30D.A1 n23037 C1TOFCO_DE --- 0.889 R15C30D.A1 to R15C30D.FCO SLICE_4 ROUTE 1 0.000 R15C30D.FCO to R15C31A.FCI n80357 FCITOF0_DE --- 0.585 R15C31A.FCI to R15C31A.F0 SLICE_3 ROUTE 1 1.962 R15C31A.F0 to R16C30C.B0 n23132 C0TOFCO_DE --- 1.023 R16C30C.B0 to R16C30C.FCO SLICE_20 ROUTE 1 0.000 R16C30C.FCO to R16C30D.FCI n80344 FCITOFCO_D --- 0.162 R16C30D.FCI to R16C30D.FCO SLICE_19 ROUTE 1 0.000 R16C30D.FCO to R16C31A.FCI n80345 FCITOFCO_D --- 0.162 R16C31A.FCI to R16C31A.FCO SLICE_18 ROUTE 1 0.000 R16C31A.FCO to R16C31B.FCI n80346 FCITOF1_DE --- 0.643 R16C31B.FCI to R16C31B.F1 SLICE_17 ROUTE 10 1.910 R16C31B.F1 to R17C30A.B0 bin_code_19 CTOF_DEL --- 0.495 R17C30A.B0 to R17C30A.F0 bin_to_bcd_lf/SLICE_2024 ROUTE 8 1.016 R17C30A.F0 to R17C30C.A1 bin_to_bcd_lf/bcd_code_24__N_355 CTOF_DEL --- 0.495 R17C30C.A1 to R17C30C.F1 bin_to_bcd_lf/SLICE_1431 ROUTE 5 1.459 R17C30C.F1 to R17C29A.B1 bin_to_bcd_lf/n90728 CTOF_DEL --- 0.495 R17C29A.B1 to R17C29A.F1 bin_to_bcd_lf/SLICE_2045 ROUTE 10 1.901 R17C29A.F1 to R16C29A.B1 bin_to_bcd_lf/bcd_code_24__N_373 CTOF_DEL --- 0.495 R16C29A.B1 to R16C29A.F1 bin_to_bcd_lf/SLICE_2033 ROUTE 3 1.359 R16C29A.F1 to R17C28A.B1 bin_to_bcd_lf/n88461 CTOF_DEL --- 0.495 R17C28A.B1 to R17C28A.F1 bin_to_bcd_lf/SLICE_2018 ROUTE 10 1.367 R17C28A.F1 to R16C29B.A0 bin_to_bcd_lf/bcd_code_24__N_391 CTOF_DEL --- 0.495 R16C29B.A0 to R16C29B.F0 bin_to_bcd_lf/SLICE_1617 ROUTE 3 0.445 R16C29B.F0 to R16C29A.C0 bin_to_bcd_lf/n88437 CTOF_DEL --- 0.495 R16C29A.C0 to R16C29A.F0 bin_to_bcd_lf/SLICE_2033 ROUTE 9 1.902 R16C29A.F0 to R17C28C.B1 bin_to_bcd_lf/bcd_code_24__N_418 CTOF_DEL --- 0.495 R17C28C.B1 to R17C28C.F1 bin_to_bcd_lf/SLICE_2013 ROUTE 5 1.405 R17C28C.F1 to R18C26D.D0 bin_to_bcd_lf/bcd_code_24__N_413 CTOF_DEL --- 0.495 R18C26D.D0 to R18C26D.F0 bin_to_bcd_lf/SLICE_2355 ROUTE 5 1.841 R18C26D.F0 to R17C24B.D1 bin_to_bcd_lf/n88369 CTOF_DEL --- 0.495 R17C24B.D1 to R17C24B.F1 bin_to_bcd_lf/SLICE_2097 ROUTE 3 0.640 R17C24B.F1 to R17C25D.D1 bin_to_bcd_lf/n88358 CTOF_DEL --- 0.495 R17C25D.D1 to R17C25D.F1 bin_to_bcd_lf/SLICE_2002 ROUTE 9 0.796 R17C25D.F1 to R17C25B.C1 bin_to_bcd_lf/bcd_code_24__N_436 CTOF_DEL --- 0.495 R17C25B.C1 to R17C25B.F1 bin_to_bcd_lf/SLICE_2084 ROUTE 3 1.040 R17C25B.F1 to R17C24C.B1 bin_to_bcd_lf/n88320 CTOF_DEL --- 0.495 R17C24C.B1 to R17C24C.F1 bin_to_bcd_lf/SLICE_2003 ROUTE 10 1.905 R17C24C.F1 to R16C25A.A1 bin_to_bcd_lf/bcd_code_24__N_474 CTOF_DEL --- 0.495 R16C25A.A1 to R16C25A.F1 bin_to_bcd_lf/SLICE_2088 ROUTE 5 1.361 R16C25A.F1 to R15C24B.B0 bin_to_bcd_lf/n88231 CTOF_DEL --- 0.495 R15C24B.B0 to R15C24B.F0 bin_to_bcd_lf/SLICE_1634 ROUTE 2 1.010 R15C24B.F0 to R15C23C.B0 bin_to_bcd_lf/n88212 CTOF_DEL --- 0.495 R15C23C.B0 to R15C23C.F0 bin_to_bcd_lf/SLICE_1636 ROUTE 9 1.574 R15C23C.F0 to R16C25B.C0 bin_to_bcd_lf/bcd_code_24__N_501 CTOF_DEL --- 0.495 R16C25B.C0 to R16C25B.F0 bin_to_bcd_lf/SLICE_2082 ROUTE 3 0.758 R16C25B.F0 to R15C25B.C1 bin_to_bcd_lf/n88166 CTOF_DEL --- 0.495 R15C25B.C1 to R15C25B.F1 bin_to_bcd_lf/SLICE_2050 ROUTE 10 1.839 R15C25B.F1 to R16C26D.B0 bin_to_bcd_lf/bcd_code_24__N_543 CTOF_DEL --- 0.495 R16C26D.B0 to R16C26D.F0 bin_to_bcd_lf/SLICE_2058 ROUTE 2 0.993 R16C26D.F0 to R17C26B.A0 bin_to_bcd_lf/n88109 CTOF_DEL --- 0.495 R17C26B.A0 to R17C26B.F0 bin_to_bcd_lf/SLICE_2063 ROUTE 5 2.352 R17C26B.F0 to R13C25D.D0 bin_to_bcd_lf/n88094 CTOF_DEL --- 0.495 R13C25D.D0 to R13C25D.F0 bin_to_bcd_lf/SLICE_2020 ROUTE 4 0.995 R13C25D.F0 to R12C25C.A1 bin_to_bcd_lf/n88036 CTOF_DEL --- 0.495 R12C25C.A1 to R12C25C.F1 bin_to_bcd_lf/SLICE_2085 ROUTE 2 0.995 R12C25C.F1 to R14C25A.A1 bin_to_bcd_lf/n88023 CTOF_DEL --- 0.495 R14C25A.A1 to R14C25A.F1 bin_to_bcd_lf/SLICE_2032 ROUTE 10 1.958 R14C25A.F1 to R9C25C.D1 bin_to_bcd_lf/bcd_code_24__N_634 CTOF_DEL --- 0.495 R9C25C.D1 to R9C25C.F1 bin_to_bcd_lf/SLICE_2053 ROUTE 3 1.542 R9C25C.F1 to R12C25C.A0 bin_to_bcd_lf/n87987 CTOF_DEL --- 0.495 R12C25C.A0 to R12C25C.F0 bin_to_bcd_lf/SLICE_2085 ROUTE 9 2.420 R12C25C.F0 to R9C25B.A0 bin_to_bcd_lf/bcd_code_24__N_685 CTOF_DEL --- 0.495 R9C25B.A0 to R9C25B.F0 bin_to_bcd_lf/SLICE_1622 ROUTE 3 1.028 R9C25B.F0 to R8C25B.B0 bin_to_bcd_lf/n87958 CTOF_DEL --- 0.495 R8C25B.B0 to R8C25B.F0 bin_to_bcd_lf/SLICE_2054 ROUTE 10 1.472 R8C25B.F0 to R10C24D.A1 bin_to_bcd_lf/bcd_code_24__N_736 CTOF_DEL --- 0.495 R10C24D.A1 to R10C24D.F1 bin_to_bcd_lf/SLICE_2036 ROUTE 2 1.534 R10C24D.F1 to R12C26B.A1 bin_to_bcd_lf/n87938 CTOF_DEL --- 0.495 R12C26B.A1 to R12C26B.F1 bin_to_bcd_lf/SLICE_2025 ROUTE 7 2.191 R12C26B.F1 to R8C24B.C1 bin_to_bcd_lf/n87934 CTOF_DEL --- 0.495 R8C24B.C1 to R8C24B.F1 bin_to_bcd_lf/SLICE_2113 ROUTE 1 1.450 R8C24B.F1 to R9C22A.B1 bcd_code_16 CTOOFX_DEL --- 0.721 R9C22A.B1 to R9C22A.OFX0 OLED12832_lf/i37_adj_422/SLICE_1200 ROUTE 1 2.713 R9C22A.OFX0 to R15C19D.A1 OLED12832_lf/n17_adj_3361 CTOF_DEL --- 0.495 R15C19D.A1 to R15C19D.F1 SLICE_1529 ROUTE 1 0.436 R15C19D.F1 to R15C19D.C0 OLED12832_lf/char_167_N_1296_32 CTOF_DEL --- 0.495 R15C19D.C0 to R15C19D.F0 SLICE_1529 ROUTE 1 0.766 R15C19D.F0 to R13C19D.C1 OLED12832_lf/n16_adj_3358 CTOF_DEL --- 0.495 R13C19D.C1 to R13C19D.F1 OLED12832_lf/SLICE_296 ROUTE 1 0.000 R13C19D.F1 to R13C19D.DI1 OLED12832_lf/char_167_N_915_32 (to clk_c) -------- 84.415 (29.1% logic, 70.9% route), 46 logic levels. Clock Skew Details: Source Clock Path clk to SLICE_984: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R3C10D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Destination Clock Path clk to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R13C19D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Passed: The following path meets requirements by 40.431ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q DS18B20Z_lf/data_out_i0_i11 (from clk_c +) Destination: FF Data in OLED12832_lf/char_i32 (to clk_c +) Delay: 84.403ns (28.8% logic, 71.2% route), 47 logic levels. Constraint Details: 84.403ns physical path delay SLICE_985 to OLED12832_lf/SLICE_296 meets 125.000ns delay constraint less 0.000ns skew and 0.166ns DIN_SET requirement (totaling 124.834ns) by 40.431ns Physical Path Details: Data path SLICE_985 to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.452 R7C6D.CLK to R7C6D.Q1 SLICE_985 (from clk_c) ROUTE 1 2.180 R7C6D.Q1 to R13C17D.D0 data_out_11 CTOF_DEL --- 0.495 R13C17D.D0 to R13C17D.F0 SLICE_1684 ROUTE 8 2.967 R13C17D.F0 to R13C29C.A1 n8_adj_3562 CTOF_DEL --- 0.495 R13C29C.A1 to R13C29C.F1 SLICE_1650 ROUTE 38 1.872 R13C29C.F1 to R14C31D.A1 n88625 CTOF_DEL --- 0.495 R14C31D.A1 to R14C31D.F1 SLICE_2319 ROUTE 1 1.001 R14C31D.F1 to R14C30A.B1 temperature_code_1 C1TOFCO_DE --- 0.889 R14C30A.B1 to R14C30A.FCO SLICE_107 ROUTE 1 0.000 R14C30A.FCO to R14C30B.FCI n80436 FCITOF1_DE --- 0.643 R14C30B.FCI to R14C30B.F1 SLICE_106 ROUTE 1 1.763 R14C30B.F1 to R15C30C.B0 n22980 C0TOFCO_DE --- 1.023 R15C30C.B0 to R15C30C.FCO SLICE_5 ROUTE 1 0.000 R15C30C.FCO to R15C30D.FCI n80356 FCITOFCO_D --- 0.162 R15C30D.FCI to R15C30D.FCO SLICE_4 ROUTE 1 0.000 R15C30D.FCO to R15C31A.FCI n80357 FCITOF0_DE --- 0.585 R15C31A.FCI to R15C31A.F0 SLICE_3 ROUTE 1 1.962 R15C31A.F0 to R16C30C.B0 n23132 C0TOFCO_DE --- 1.023 R16C30C.B0 to R16C30C.FCO SLICE_20 ROUTE 1 0.000 R16C30C.FCO to R16C30D.FCI n80344 FCITOFCO_D --- 0.162 R16C30D.FCI to R16C30D.FCO SLICE_19 ROUTE 1 0.000 R16C30D.FCO to R16C31A.FCI n80345 FCITOFCO_D --- 0.162 R16C31A.FCI to R16C31A.FCO SLICE_18 ROUTE 1 0.000 R16C31A.FCO to R16C31B.FCI n80346 FCITOF1_DE --- 0.643 R16C31B.FCI to R16C31B.F1 SLICE_17 ROUTE 10 1.910 R16C31B.F1 to R17C30A.B0 bin_code_19 CTOF_DEL --- 0.495 R17C30A.B0 to R17C30A.F0 bin_to_bcd_lf/SLICE_2024 ROUTE 8 1.016 R17C30A.F0 to R17C30C.A1 bin_to_bcd_lf/bcd_code_24__N_355 CTOF_DEL --- 0.495 R17C30C.A1 to R17C30C.F1 bin_to_bcd_lf/SLICE_1431 ROUTE 5 1.459 R17C30C.F1 to R17C29A.B1 bin_to_bcd_lf/n90728 CTOF_DEL --- 0.495 R17C29A.B1 to R17C29A.F1 bin_to_bcd_lf/SLICE_2045 ROUTE 10 1.901 R17C29A.F1 to R16C29A.B1 bin_to_bcd_lf/bcd_code_24__N_373 CTOF_DEL --- 0.495 R16C29A.B1 to R16C29A.F1 bin_to_bcd_lf/SLICE_2033 ROUTE 3 1.359 R16C29A.F1 to R17C28A.B1 bin_to_bcd_lf/n88461 CTOF_DEL --- 0.495 R17C28A.B1 to R17C28A.F1 bin_to_bcd_lf/SLICE_2018 ROUTE 10 1.367 R17C28A.F1 to R16C29B.A0 bin_to_bcd_lf/bcd_code_24__N_391 CTOF_DEL --- 0.495 R16C29B.A0 to R16C29B.F0 bin_to_bcd_lf/SLICE_1617 ROUTE 3 0.445 R16C29B.F0 to R16C29A.C0 bin_to_bcd_lf/n88437 CTOF_DEL --- 0.495 R16C29A.C0 to R16C29A.F0 bin_to_bcd_lf/SLICE_2033 ROUTE 9 1.902 R16C29A.F0 to R17C28C.B1 bin_to_bcd_lf/bcd_code_24__N_418 CTOF_DEL --- 0.495 R17C28C.B1 to R17C28C.F1 bin_to_bcd_lf/SLICE_2013 ROUTE 5 1.405 R17C28C.F1 to R18C26D.D0 bin_to_bcd_lf/bcd_code_24__N_413 CTOF_DEL --- 0.495 R18C26D.D0 to R18C26D.F0 bin_to_bcd_lf/SLICE_2355 ROUTE 5 1.841 R18C26D.F0 to R17C24B.D1 bin_to_bcd_lf/n88369 CTOF_DEL --- 0.495 R17C24B.D1 to R17C24B.F1 bin_to_bcd_lf/SLICE_2097 ROUTE 3 0.640 R17C24B.F1 to R17C25D.D1 bin_to_bcd_lf/n88358 CTOF_DEL --- 0.495 R17C25D.D1 to R17C25D.F1 bin_to_bcd_lf/SLICE_2002 ROUTE 9 0.796 R17C25D.F1 to R17C25B.C1 bin_to_bcd_lf/bcd_code_24__N_436 CTOF_DEL --- 0.495 R17C25B.C1 to R17C25B.F1 bin_to_bcd_lf/SLICE_2084 ROUTE 3 1.040 R17C25B.F1 to R17C24C.B1 bin_to_bcd_lf/n88320 CTOF_DEL --- 0.495 R17C24C.B1 to R17C24C.F1 bin_to_bcd_lf/SLICE_2003 ROUTE 10 1.905 R17C24C.F1 to R16C25A.A1 bin_to_bcd_lf/bcd_code_24__N_474 CTOF_DEL --- 0.495 R16C25A.A1 to R16C25A.F1 bin_to_bcd_lf/SLICE_2088 ROUTE 5 1.361 R16C25A.F1 to R15C24B.B0 bin_to_bcd_lf/n88231 CTOF_DEL --- 0.495 R15C24B.B0 to R15C24B.F0 bin_to_bcd_lf/SLICE_1634 ROUTE 2 1.010 R15C24B.F0 to R15C23C.B0 bin_to_bcd_lf/n88212 CTOF_DEL --- 0.495 R15C23C.B0 to R15C23C.F0 bin_to_bcd_lf/SLICE_1636 ROUTE 9 1.574 R15C23C.F0 to R16C25B.C0 bin_to_bcd_lf/bcd_code_24__N_501 CTOF_DEL --- 0.495 R16C25B.C0 to R16C25B.F0 bin_to_bcd_lf/SLICE_2082 ROUTE 3 0.758 R16C25B.F0 to R15C25B.C1 bin_to_bcd_lf/n88166 CTOF_DEL --- 0.495 R15C25B.C1 to R15C25B.F1 bin_to_bcd_lf/SLICE_2050 ROUTE 10 1.839 R15C25B.F1 to R16C26D.B0 bin_to_bcd_lf/bcd_code_24__N_543 CTOF_DEL --- 0.495 R16C26D.B0 to R16C26D.F0 bin_to_bcd_lf/SLICE_2058 ROUTE 2 0.993 R16C26D.F0 to R17C26B.A0 bin_to_bcd_lf/n88109 CTOF_DEL --- 0.495 R17C26B.A0 to R17C26B.F0 bin_to_bcd_lf/SLICE_2063 ROUTE 5 2.352 R17C26B.F0 to R13C25D.D0 bin_to_bcd_lf/n88094 CTOF_DEL --- 0.495 R13C25D.D0 to R13C25D.F0 bin_to_bcd_lf/SLICE_2020 ROUTE 4 0.995 R13C25D.F0 to R12C25C.A1 bin_to_bcd_lf/n88036 CTOF_DEL --- 0.495 R12C25C.A1 to R12C25C.F1 bin_to_bcd_lf/SLICE_2085 ROUTE 2 0.995 R12C25C.F1 to R14C25A.A1 bin_to_bcd_lf/n88023 CTOF_DEL --- 0.495 R14C25A.A1 to R14C25A.F1 bin_to_bcd_lf/SLICE_2032 ROUTE 10 1.958 R14C25A.F1 to R9C25C.D1 bin_to_bcd_lf/bcd_code_24__N_634 CTOF_DEL --- 0.495 R9C25C.D1 to R9C25C.F1 bin_to_bcd_lf/SLICE_2053 ROUTE 3 1.542 R9C25C.F1 to R12C25C.A0 bin_to_bcd_lf/n87987 CTOF_DEL --- 0.495 R12C25C.A0 to R12C25C.F0 bin_to_bcd_lf/SLICE_2085 ROUTE 9 2.420 R12C25C.F0 to R9C25B.A0 bin_to_bcd_lf/bcd_code_24__N_685 CTOF_DEL --- 0.495 R9C25B.A0 to R9C25B.F0 bin_to_bcd_lf/SLICE_1622 ROUTE 3 1.028 R9C25B.F0 to R8C25B.B0 bin_to_bcd_lf/n87958 CTOF_DEL --- 0.495 R8C25B.B0 to R8C25B.F0 bin_to_bcd_lf/SLICE_2054 ROUTE 10 1.472 R8C25B.F0 to R10C24D.A1 bin_to_bcd_lf/bcd_code_24__N_736 CTOF_DEL --- 0.495 R10C24D.A1 to R10C24D.F1 bin_to_bcd_lf/SLICE_2036 ROUTE 2 1.534 R10C24D.F1 to R12C26B.A1 bin_to_bcd_lf/n87938 CTOF_DEL --- 0.495 R12C26B.A1 to R12C26B.F1 bin_to_bcd_lf/SLICE_2025 ROUTE 7 2.191 R12C26B.F1 to R8C24B.C1 bin_to_bcd_lf/n87934 CTOF_DEL --- 0.495 R8C24B.C1 to R8C24B.F1 bin_to_bcd_lf/SLICE_2113 ROUTE 1 1.450 R8C24B.F1 to R9C22A.B1 bcd_code_16 CTOOFX_DEL --- 0.721 R9C22A.B1 to R9C22A.OFX0 OLED12832_lf/i37_adj_422/SLICE_1200 ROUTE 1 2.713 R9C22A.OFX0 to R15C19D.A1 OLED12832_lf/n17_adj_3361 CTOF_DEL --- 0.495 R15C19D.A1 to R15C19D.F1 SLICE_1529 ROUTE 1 0.436 R15C19D.F1 to R15C19D.C0 OLED12832_lf/char_167_N_1296_32 CTOF_DEL --- 0.495 R15C19D.C0 to R15C19D.F0 SLICE_1529 ROUTE 1 0.766 R15C19D.F0 to R13C19D.C1 OLED12832_lf/n16_adj_3358 CTOF_DEL --- 0.495 R13C19D.C1 to R13C19D.F1 OLED12832_lf/SLICE_296 ROUTE 1 0.000 R13C19D.F1 to R13C19D.DI1 OLED12832_lf/char_167_N_915_32 (to clk_c) -------- 84.403 (28.8% logic, 71.2% route), 47 logic levels. Clock Skew Details: Source Clock Path clk to SLICE_985: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R7C6D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Destination Clock Path clk to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R13C19D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Passed: The following path meets requirements by 40.481ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q DS18B20Z_lf/data_out_i0_i11 (from clk_c +) Destination: FF Data in OLED12832_lf/char_i32 (to clk_c +) Delay: 84.353ns (28.9% logic, 71.1% route), 49 logic levels. Constraint Details: 84.353ns physical path delay SLICE_985 to OLED12832_lf/SLICE_296 meets 125.000ns delay constraint less 0.000ns skew and 0.166ns DIN_SET requirement (totaling 124.834ns) by 40.481ns Physical Path Details: Data path SLICE_985 to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.452 R7C6D.CLK to R7C6D.Q1 SLICE_985 (from clk_c) ROUTE 1 2.180 R7C6D.Q1 to R13C17D.D0 data_out_11 CTOF_DEL --- 0.495 R13C17D.D0 to R13C17D.F0 SLICE_1684 ROUTE 8 2.967 R13C17D.F0 to R13C29C.A1 n8_adj_3562 CTOF_DEL --- 0.495 R13C29C.A1 to R13C29C.F1 SLICE_1650 ROUTE 38 0.750 R13C29C.F1 to R13C29D.B1 n88625 CTOF_DEL --- 0.495 R13C29D.B1 to R13C29D.F1 SLICE_2321 ROUTE 2 1.810 R13C29D.F1 to R13C30A.A1 temperature_code_4 C1TOFCO_DE --- 0.889 R13C30A.A1 to R13C30A.FCO SLICE_15 ROUTE 1 0.000 R13C30A.FCO to R13C30B.FCI n80348 FCITOF0_DE --- 0.585 R13C30B.FCI to R13C30B.F0 SLICE_14 ROUTE 1 1.877 R13C30B.F0 to R15C30A.B1 n23043 C1TOFCO_DE --- 0.889 R15C30A.B1 to R15C30A.FCO SLICE_7 ROUTE 1 0.000 R15C30A.FCO to R15C30B.FCI n80354 FCITOFCO_D --- 0.162 R15C30B.FCI to R15C30B.FCO SLICE_6 ROUTE 1 0.000 R15C30B.FCO to R15C30C.FCI n80355 FCITOFCO_D --- 0.162 R15C30C.FCI to R15C30C.FCO SLICE_5 ROUTE 1 0.000 R15C30C.FCO to R15C30D.FCI n80356 FCITOFCO_D --- 0.162 R15C30D.FCI to R15C30D.FCO SLICE_4 ROUTE 1 0.000 R15C30D.FCO to R15C31A.FCI n80357 FCITOF0_DE --- 0.585 R15C31A.FCI to R15C31A.F0 SLICE_3 ROUTE 1 1.962 R15C31A.F0 to R16C30C.B0 n23132 C0TOFCO_DE --- 1.023 R16C30C.B0 to R16C30C.FCO SLICE_20 ROUTE 1 0.000 R16C30C.FCO to R16C30D.FCI n80344 FCITOFCO_D --- 0.162 R16C30D.FCI to R16C30D.FCO SLICE_19 ROUTE 1 0.000 R16C30D.FCO to R16C31A.FCI n80345 FCITOFCO_D --- 0.162 R16C31A.FCI to R16C31A.FCO SLICE_18 ROUTE 1 0.000 R16C31A.FCO to R16C31B.FCI n80346 FCITOF1_DE --- 0.643 R16C31B.FCI to R16C31B.F1 SLICE_17 ROUTE 10 1.910 R16C31B.F1 to R17C30A.B0 bin_code_19 CTOF_DEL --- 0.495 R17C30A.B0 to R17C30A.F0 bin_to_bcd_lf/SLICE_2024 ROUTE 8 1.016 R17C30A.F0 to R17C30C.A1 bin_to_bcd_lf/bcd_code_24__N_355 CTOF_DEL --- 0.495 R17C30C.A1 to R17C30C.F1 bin_to_bcd_lf/SLICE_1431 ROUTE 5 1.459 R17C30C.F1 to R17C29A.B1 bin_to_bcd_lf/n90728 CTOF_DEL --- 0.495 R17C29A.B1 to R17C29A.F1 bin_to_bcd_lf/SLICE_2045 ROUTE 10 1.901 R17C29A.F1 to R16C29A.B1 bin_to_bcd_lf/bcd_code_24__N_373 CTOF_DEL --- 0.495 R16C29A.B1 to R16C29A.F1 bin_to_bcd_lf/SLICE_2033 ROUTE 3 1.359 R16C29A.F1 to R17C28A.B1 bin_to_bcd_lf/n88461 CTOF_DEL --- 0.495 R17C28A.B1 to R17C28A.F1 bin_to_bcd_lf/SLICE_2018 ROUTE 10 1.367 R17C28A.F1 to R16C29B.A0 bin_to_bcd_lf/bcd_code_24__N_391 CTOF_DEL --- 0.495 R16C29B.A0 to R16C29B.F0 bin_to_bcd_lf/SLICE_1617 ROUTE 3 0.445 R16C29B.F0 to R16C29A.C0 bin_to_bcd_lf/n88437 CTOF_DEL --- 0.495 R16C29A.C0 to R16C29A.F0 bin_to_bcd_lf/SLICE_2033 ROUTE 9 1.902 R16C29A.F0 to R17C28C.B1 bin_to_bcd_lf/bcd_code_24__N_418 CTOF_DEL --- 0.495 R17C28C.B1 to R17C28C.F1 bin_to_bcd_lf/SLICE_2013 ROUTE 5 1.405 R17C28C.F1 to R18C26D.D0 bin_to_bcd_lf/bcd_code_24__N_413 CTOF_DEL --- 0.495 R18C26D.D0 to R18C26D.F0 bin_to_bcd_lf/SLICE_2355 ROUTE 5 1.841 R18C26D.F0 to R17C24B.D1 bin_to_bcd_lf/n88369 CTOF_DEL --- 0.495 R17C24B.D1 to R17C24B.F1 bin_to_bcd_lf/SLICE_2097 ROUTE 3 0.453 R17C24B.F1 to R17C24B.C0 bin_to_bcd_lf/n88358 CTOF_DEL --- 0.495 R17C24B.C0 to R17C24B.F0 bin_to_bcd_lf/SLICE_2097 ROUTE 4 1.000 R17C24B.F0 to R17C25B.A1 bin_to_bcd_lf/n88333 CTOF_DEL --- 0.495 R17C25B.A1 to R17C25B.F1 bin_to_bcd_lf/SLICE_2084 ROUTE 3 1.040 R17C25B.F1 to R17C24C.B1 bin_to_bcd_lf/n88320 CTOF_DEL --- 0.495 R17C24C.B1 to R17C24C.F1 bin_to_bcd_lf/SLICE_2003 ROUTE 10 1.905 R17C24C.F1 to R16C25A.A1 bin_to_bcd_lf/bcd_code_24__N_474 CTOF_DEL --- 0.495 R16C25A.A1 to R16C25A.F1 bin_to_bcd_lf/SLICE_2088 ROUTE 5 1.361 R16C25A.F1 to R15C24B.B0 bin_to_bcd_lf/n88231 CTOF_DEL --- 0.495 R15C24B.B0 to R15C24B.F0 bin_to_bcd_lf/SLICE_1634 ROUTE 2 1.010 R15C24B.F0 to R15C23C.B0 bin_to_bcd_lf/n88212 CTOF_DEL --- 0.495 R15C23C.B0 to R15C23C.F0 bin_to_bcd_lf/SLICE_1636 ROUTE 9 1.574 R15C23C.F0 to R16C25B.C0 bin_to_bcd_lf/bcd_code_24__N_501 CTOF_DEL --- 0.495 R16C25B.C0 to R16C25B.F0 bin_to_bcd_lf/SLICE_2082 ROUTE 3 0.758 R16C25B.F0 to R15C25B.C1 bin_to_bcd_lf/n88166 CTOF_DEL --- 0.495 R15C25B.C1 to R15C25B.F1 bin_to_bcd_lf/SLICE_2050 ROUTE 10 1.839 R15C25B.F1 to R16C26D.B0 bin_to_bcd_lf/bcd_code_24__N_543 CTOF_DEL --- 0.495 R16C26D.B0 to R16C26D.F0 bin_to_bcd_lf/SLICE_2058 ROUTE 2 0.993 R16C26D.F0 to R17C26B.A0 bin_to_bcd_lf/n88109 CTOF_DEL --- 0.495 R17C26B.A0 to R17C26B.F0 bin_to_bcd_lf/SLICE_2063 ROUTE 5 2.352 R17C26B.F0 to R13C25D.D0 bin_to_bcd_lf/n88094 CTOF_DEL --- 0.495 R13C25D.D0 to R13C25D.F0 bin_to_bcd_lf/SLICE_2020 ROUTE 4 0.995 R13C25D.F0 to R12C25C.A1 bin_to_bcd_lf/n88036 CTOF_DEL --- 0.495 R12C25C.A1 to R12C25C.F1 bin_to_bcd_lf/SLICE_2085 ROUTE 2 0.995 R12C25C.F1 to R14C25A.A1 bin_to_bcd_lf/n88023 CTOF_DEL --- 0.495 R14C25A.A1 to R14C25A.F1 bin_to_bcd_lf/SLICE_2032 ROUTE 10 1.958 R14C25A.F1 to R9C25C.D1 bin_to_bcd_lf/bcd_code_24__N_634 CTOF_DEL --- 0.495 R9C25C.D1 to R9C25C.F1 bin_to_bcd_lf/SLICE_2053 ROUTE 3 1.542 R9C25C.F1 to R12C25C.A0 bin_to_bcd_lf/n87987 CTOF_DEL --- 0.495 R12C25C.A0 to R12C25C.F0 bin_to_bcd_lf/SLICE_2085 ROUTE 9 2.420 R12C25C.F0 to R9C25B.A0 bin_to_bcd_lf/bcd_code_24__N_685 CTOF_DEL --- 0.495 R9C25B.A0 to R9C25B.F0 bin_to_bcd_lf/SLICE_1622 ROUTE 3 1.028 R9C25B.F0 to R8C25B.B0 bin_to_bcd_lf/n87958 CTOF_DEL --- 0.495 R8C25B.B0 to R8C25B.F0 bin_to_bcd_lf/SLICE_2054 ROUTE 10 1.472 R8C25B.F0 to R10C24D.A1 bin_to_bcd_lf/bcd_code_24__N_736 CTOF_DEL --- 0.495 R10C24D.A1 to R10C24D.F1 bin_to_bcd_lf/SLICE_2036 ROUTE 2 1.534 R10C24D.F1 to R12C26B.A1 bin_to_bcd_lf/n87938 CTOF_DEL --- 0.495 R12C26B.A1 to R12C26B.F1 bin_to_bcd_lf/SLICE_2025 ROUTE 7 2.191 R12C26B.F1 to R8C24B.C1 bin_to_bcd_lf/n87934 CTOF_DEL --- 0.495 R8C24B.C1 to R8C24B.F1 bin_to_bcd_lf/SLICE_2113 ROUTE 1 1.450 R8C24B.F1 to R9C22A.B1 bcd_code_16 CTOOFX_DEL --- 0.721 R9C22A.B1 to R9C22A.OFX0 OLED12832_lf/i37_adj_422/SLICE_1200 ROUTE 1 2.713 R9C22A.OFX0 to R15C19D.A1 OLED12832_lf/n17_adj_3361 CTOF_DEL --- 0.495 R15C19D.A1 to R15C19D.F1 SLICE_1529 ROUTE 1 0.436 R15C19D.F1 to R15C19D.C0 OLED12832_lf/char_167_N_1296_32 CTOF_DEL --- 0.495 R15C19D.C0 to R15C19D.F0 SLICE_1529 ROUTE 1 0.766 R15C19D.F0 to R13C19D.C1 OLED12832_lf/n16_adj_3358 CTOF_DEL --- 0.495 R13C19D.C1 to R13C19D.F1 OLED12832_lf/SLICE_296 ROUTE 1 0.000 R13C19D.F1 to R13C19D.DI1 OLED12832_lf/char_167_N_915_32 (to clk_c) -------- 84.353 (28.9% logic, 71.1% route), 49 logic levels. Clock Skew Details: Source Clock Path clk to SLICE_985: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R7C6D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Destination Clock Path clk to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R13C19D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Passed: The following path meets requirements by 40.498ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q DS18B20Z_lf/data_out_i0_i11 (from clk_c +) Destination: FF Data in OLED12832_lf/char_i32 (to clk_c +) Delay: 84.336ns (29.0% logic, 71.0% route), 49 logic levels. Constraint Details: 84.336ns physical path delay SLICE_985 to OLED12832_lf/SLICE_296 meets 125.000ns delay constraint less 0.000ns skew and 0.166ns DIN_SET requirement (totaling 124.834ns) by 40.498ns Physical Path Details: Data path SLICE_985 to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.452 R7C6D.CLK to R7C6D.Q1 SLICE_985 (from clk_c) ROUTE 1 2.180 R7C6D.Q1 to R13C17D.D0 data_out_11 CTOF_DEL --- 0.495 R13C17D.D0 to R13C17D.F0 SLICE_1684 ROUTE 8 2.967 R13C17D.F0 to R13C29C.A1 n8_adj_3562 CTOF_DEL --- 0.495 R13C29C.A1 to R13C29C.F1 SLICE_1650 ROUTE 38 0.750 R13C29C.F1 to R13C29D.B1 n88625 CTOF_DEL --- 0.495 R13C29D.B1 to R13C29D.F1 SLICE_2321 ROUTE 2 1.810 R13C29D.F1 to R13C30A.A1 temperature_code_4 C1TOFCO_DE --- 0.889 R13C30A.A1 to R13C30A.FCO SLICE_15 ROUTE 1 0.000 R13C30A.FCO to R13C30B.FCI n80348 FCITOF0_DE --- 0.585 R13C30B.FCI to R13C30B.F0 SLICE_14 ROUTE 1 1.877 R13C30B.F0 to R15C30A.B1 n23043 C1TOFCO_DE --- 0.889 R15C30A.B1 to R15C30A.FCO SLICE_7 ROUTE 1 0.000 R15C30A.FCO to R15C30B.FCI n80354 FCITOFCO_D --- 0.162 R15C30B.FCI to R15C30B.FCO SLICE_6 ROUTE 1 0.000 R15C30B.FCO to R15C30C.FCI n80355 FCITOFCO_D --- 0.162 R15C30C.FCI to R15C30C.FCO SLICE_5 ROUTE 1 0.000 R15C30C.FCO to R15C30D.FCI n80356 FCITOFCO_D --- 0.162 R15C30D.FCI to R15C30D.FCO SLICE_4 ROUTE 1 0.000 R15C30D.FCO to R15C31A.FCI n80357 FCITOF0_DE --- 0.585 R15C31A.FCI to R15C31A.F0 SLICE_3 ROUTE 1 1.962 R15C31A.F0 to R16C30C.B0 n23132 C0TOFCO_DE --- 1.023 R16C30C.B0 to R16C30C.FCO SLICE_20 ROUTE 1 0.000 R16C30C.FCO to R16C30D.FCI n80344 FCITOFCO_D --- 0.162 R16C30D.FCI to R16C30D.FCO SLICE_19 ROUTE 1 0.000 R16C30D.FCO to R16C31A.FCI n80345 FCITOFCO_D --- 0.162 R16C31A.FCI to R16C31A.FCO SLICE_18 ROUTE 1 0.000 R16C31A.FCO to R16C31B.FCI n80346 FCITOF1_DE --- 0.643 R16C31B.FCI to R16C31B.F1 SLICE_17 ROUTE 10 1.910 R16C31B.F1 to R17C30A.B0 bin_code_19 CTOF_DEL --- 0.495 R17C30A.B0 to R17C30A.F0 bin_to_bcd_lf/SLICE_2024 ROUTE 8 1.016 R17C30A.F0 to R17C30C.A1 bin_to_bcd_lf/bcd_code_24__N_355 CTOF_DEL --- 0.495 R17C30C.A1 to R17C30C.F1 bin_to_bcd_lf/SLICE_1431 ROUTE 5 1.459 R17C30C.F1 to R17C29A.B1 bin_to_bcd_lf/n90728 CTOF_DEL --- 0.495 R17C29A.B1 to R17C29A.F1 bin_to_bcd_lf/SLICE_2045 ROUTE 10 1.901 R17C29A.F1 to R16C29A.B1 bin_to_bcd_lf/bcd_code_24__N_373 CTOF_DEL --- 0.495 R16C29A.B1 to R16C29A.F1 bin_to_bcd_lf/SLICE_2033 ROUTE 3 1.359 R16C29A.F1 to R17C28A.B1 bin_to_bcd_lf/n88461 CTOF_DEL --- 0.495 R17C28A.B1 to R17C28A.F1 bin_to_bcd_lf/SLICE_2018 ROUTE 10 1.367 R17C28A.F1 to R16C29B.A0 bin_to_bcd_lf/bcd_code_24__N_391 CTOF_DEL --- 0.495 R16C29B.A0 to R16C29B.F0 bin_to_bcd_lf/SLICE_1617 ROUTE 3 0.445 R16C29B.F0 to R16C29A.C0 bin_to_bcd_lf/n88437 CTOF_DEL --- 0.495 R16C29A.C0 to R16C29A.F0 bin_to_bcd_lf/SLICE_2033 ROUTE 9 1.902 R16C29A.F0 to R17C28C.B1 bin_to_bcd_lf/bcd_code_24__N_418 CTOF_DEL --- 0.495 R17C28C.B1 to R17C28C.F1 bin_to_bcd_lf/SLICE_2013 ROUTE 5 1.405 R17C28C.F1 to R18C26D.D0 bin_to_bcd_lf/bcd_code_24__N_413 CTOF_DEL --- 0.495 R18C26D.D0 to R18C26D.F0 bin_to_bcd_lf/SLICE_2355 ROUTE 5 1.841 R18C26D.F0 to R17C24B.D1 bin_to_bcd_lf/n88369 CTOF_DEL --- 0.495 R17C24B.D1 to R17C24B.F1 bin_to_bcd_lf/SLICE_2097 ROUTE 3 0.640 R17C24B.F1 to R17C25D.D1 bin_to_bcd_lf/n88358 CTOF_DEL --- 0.495 R17C25D.D1 to R17C25D.F1 bin_to_bcd_lf/SLICE_2002 ROUTE 9 0.796 R17C25D.F1 to R17C25B.C1 bin_to_bcd_lf/bcd_code_24__N_436 CTOF_DEL --- 0.495 R17C25B.C1 to R17C25B.F1 bin_to_bcd_lf/SLICE_2084 ROUTE 3 1.040 R17C25B.F1 to R17C24C.B1 bin_to_bcd_lf/n88320 CTOF_DEL --- 0.495 R17C24C.B1 to R17C24C.F1 bin_to_bcd_lf/SLICE_2003 ROUTE 10 1.905 R17C24C.F1 to R16C25A.A1 bin_to_bcd_lf/bcd_code_24__N_474 CTOF_DEL --- 0.495 R16C25A.A1 to R16C25A.F1 bin_to_bcd_lf/SLICE_2088 ROUTE 5 1.361 R16C25A.F1 to R15C24B.B0 bin_to_bcd_lf/n88231 CTOF_DEL --- 0.495 R15C24B.B0 to R15C24B.F0 bin_to_bcd_lf/SLICE_1634 ROUTE 2 1.010 R15C24B.F0 to R15C23C.B0 bin_to_bcd_lf/n88212 CTOF_DEL --- 0.495 R15C23C.B0 to R15C23C.F0 bin_to_bcd_lf/SLICE_1636 ROUTE 9 1.574 R15C23C.F0 to R16C25B.C0 bin_to_bcd_lf/bcd_code_24__N_501 CTOF_DEL --- 0.495 R16C25B.C0 to R16C25B.F0 bin_to_bcd_lf/SLICE_2082 ROUTE 3 0.758 R16C25B.F0 to R15C25B.C1 bin_to_bcd_lf/n88166 CTOF_DEL --- 0.495 R15C25B.C1 to R15C25B.F1 bin_to_bcd_lf/SLICE_2050 ROUTE 10 1.839 R15C25B.F1 to R16C26D.B0 bin_to_bcd_lf/bcd_code_24__N_543 CTOF_DEL --- 0.495 R16C26D.B0 to R16C26D.F0 bin_to_bcd_lf/SLICE_2058 ROUTE 2 0.993 R16C26D.F0 to R17C26B.A0 bin_to_bcd_lf/n88109 CTOF_DEL --- 0.495 R17C26B.A0 to R17C26B.F0 bin_to_bcd_lf/SLICE_2063 ROUTE 5 2.352 R17C26B.F0 to R13C25D.D0 bin_to_bcd_lf/n88094 CTOF_DEL --- 0.495 R13C25D.D0 to R13C25D.F0 bin_to_bcd_lf/SLICE_2020 ROUTE 4 0.995 R13C25D.F0 to R12C25C.A1 bin_to_bcd_lf/n88036 CTOF_DEL --- 0.495 R12C25C.A1 to R12C25C.F1 bin_to_bcd_lf/SLICE_2085 ROUTE 2 0.995 R12C25C.F1 to R14C25A.A1 bin_to_bcd_lf/n88023 CTOF_DEL --- 0.495 R14C25A.A1 to R14C25A.F1 bin_to_bcd_lf/SLICE_2032 ROUTE 10 1.958 R14C25A.F1 to R9C25C.D1 bin_to_bcd_lf/bcd_code_24__N_634 CTOF_DEL --- 0.495 R9C25C.D1 to R9C25C.F1 bin_to_bcd_lf/SLICE_2053 ROUTE 3 1.542 R9C25C.F1 to R12C25C.A0 bin_to_bcd_lf/n87987 CTOF_DEL --- 0.495 R12C25C.A0 to R12C25C.F0 bin_to_bcd_lf/SLICE_2085 ROUTE 9 2.420 R12C25C.F0 to R9C25B.A0 bin_to_bcd_lf/bcd_code_24__N_685 CTOF_DEL --- 0.495 R9C25B.A0 to R9C25B.F0 bin_to_bcd_lf/SLICE_1622 ROUTE 3 1.028 R9C25B.F0 to R8C25B.B0 bin_to_bcd_lf/n87958 CTOF_DEL --- 0.495 R8C25B.B0 to R8C25B.F0 bin_to_bcd_lf/SLICE_2054 ROUTE 10 1.472 R8C25B.F0 to R10C24D.A1 bin_to_bcd_lf/bcd_code_24__N_736 CTOF_DEL --- 0.495 R10C24D.A1 to R10C24D.F1 bin_to_bcd_lf/SLICE_2036 ROUTE 2 1.534 R10C24D.F1 to R12C26B.A1 bin_to_bcd_lf/n87938 CTOF_DEL --- 0.495 R12C26B.A1 to R12C26B.F1 bin_to_bcd_lf/SLICE_2025 ROUTE 7 2.191 R12C26B.F1 to R8C24B.C1 bin_to_bcd_lf/n87934 CTOF_DEL --- 0.495 R8C24B.C1 to R8C24B.F1 bin_to_bcd_lf/SLICE_2113 ROUTE 1 1.450 R8C24B.F1 to R9C22A.B1 bcd_code_16 CTOOFX_DEL --- 0.721 R9C22A.B1 to R9C22A.OFX0 OLED12832_lf/i37_adj_422/SLICE_1200 ROUTE 1 2.713 R9C22A.OFX0 to R15C19D.A1 OLED12832_lf/n17_adj_3361 CTOF_DEL --- 0.495 R15C19D.A1 to R15C19D.F1 SLICE_1529 ROUTE 1 0.436 R15C19D.F1 to R15C19D.C0 OLED12832_lf/char_167_N_1296_32 CTOF_DEL --- 0.495 R15C19D.C0 to R15C19D.F0 SLICE_1529 ROUTE 1 0.766 R15C19D.F0 to R13C19D.C1 OLED12832_lf/n16_adj_3358 CTOF_DEL --- 0.495 R13C19D.C1 to R13C19D.F1 OLED12832_lf/SLICE_296 ROUTE 1 0.000 R13C19D.F1 to R13C19D.DI1 OLED12832_lf/char_167_N_915_32 (to clk_c) -------- 84.336 (29.0% logic, 71.0% route), 49 logic levels. Clock Skew Details: Source Clock Path clk to SLICE_985: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R7C6D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Destination Clock Path clk to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R13C19D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Passed: The following path meets requirements by 40.517ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q DS18B20Z_lf/data_out_i0_i8 (from clk_c +) Destination: FF Data in OLED12832_lf/char_i32 (to clk_c +) Delay: 84.317ns (29.1% logic, 70.9% route), 46 logic levels. Constraint Details: 84.317ns physical path delay SLICE_984 to OLED12832_lf/SLICE_296 meets 125.000ns delay constraint less 0.000ns skew and 0.166ns DIN_SET requirement (totaling 124.834ns) by 40.517ns Physical Path Details: Data path SLICE_984 to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.452 R3C10D.CLK to R3C10D.Q0 SLICE_984 (from clk_c) ROUTE 5 4.490 R3C10D.Q0 to R12C31A.B1 data_out_8 C1TOFCO_DE --- 0.889 R12C31A.B1 to R12C31A.FCO SLICE_37 ROUTE 1 0.000 R12C31A.FCO to R12C31B.FCI n80262 FCITOF0_DE --- 0.585 R12C31B.FCI to R12C31B.F0 SLICE_12 ROUTE 4 1.896 R12C31B.F0 to R13C29C.B0 temperature_code_10_N_12_9 CTOF_DEL --- 0.495 R13C29C.B0 to R13C29C.F0 SLICE_1650 ROUTE 2 1.846 R13C29C.F0 to R13C30D.B0 temperature_code_9 C0TOFCO_DE --- 1.023 R13C30D.B0 to R13C30D.FCO SLICE_11 ROUTE 1 0.000 R13C30D.FCO to R13C31A.FCI n80351 FCITOFCO_D --- 0.162 R13C31A.FCI to R13C31A.FCO SLICE_10 ROUTE 1 0.000 R13C31A.FCO to R13C31B.FCI n80352 FCITOFCO_D --- 0.162 R13C31B.FCI to R13C31B.FCO SLICE_9 ROUTE 1 0.000 R13C31B.FCO to R13C31C.FCI n80353 FCITOF0_DE --- 0.585 R13C31C.FCI to R13C31C.F0 SLICE_8 ROUTE 1 1.726 R13C31C.F0 to R15C31B.A1 n23049 C1TOFCO_DE --- 0.889 R15C31B.A1 to R15C31B.FCO SLICE_2 ROUTE 1 0.000 R15C31B.FCO to R15C31C.FCI n80359 FCITOF0_DE --- 0.585 R15C31C.FCI to R15C31C.F0 SLICE_1 ROUTE 1 1.420 R15C31C.F0 to R16C31A.B0 n23128 C0TOFCO_DE --- 1.023 R16C31A.B0 to R16C31A.FCO SLICE_18 ROUTE 1 0.000 R16C31A.FCO to R16C31B.FCI n80346 FCITOF1_DE --- 0.643 R16C31B.FCI to R16C31B.F1 SLICE_17 ROUTE 10 1.910 R16C31B.F1 to R17C30A.B0 bin_code_19 CTOF_DEL --- 0.495 R17C30A.B0 to R17C30A.F0 bin_to_bcd_lf/SLICE_2024 ROUTE 8 1.016 R17C30A.F0 to R17C30C.A1 bin_to_bcd_lf/bcd_code_24__N_355 CTOF_DEL --- 0.495 R17C30C.A1 to R17C30C.F1 bin_to_bcd_lf/SLICE_1431 ROUTE 5 1.459 R17C30C.F1 to R17C29A.B1 bin_to_bcd_lf/n90728 CTOF_DEL --- 0.495 R17C29A.B1 to R17C29A.F1 bin_to_bcd_lf/SLICE_2045 ROUTE 10 1.901 R17C29A.F1 to R16C29A.B1 bin_to_bcd_lf/bcd_code_24__N_373 CTOF_DEL --- 0.495 R16C29A.B1 to R16C29A.F1 bin_to_bcd_lf/SLICE_2033 ROUTE 3 1.359 R16C29A.F1 to R17C28A.B1 bin_to_bcd_lf/n88461 CTOF_DEL --- 0.495 R17C28A.B1 to R17C28A.F1 bin_to_bcd_lf/SLICE_2018 ROUTE 10 1.367 R17C28A.F1 to R16C29B.A0 bin_to_bcd_lf/bcd_code_24__N_391 CTOF_DEL --- 0.495 R16C29B.A0 to R16C29B.F0 bin_to_bcd_lf/SLICE_1617 ROUTE 3 0.445 R16C29B.F0 to R16C29A.C0 bin_to_bcd_lf/n88437 CTOF_DEL --- 0.495 R16C29A.C0 to R16C29A.F0 bin_to_bcd_lf/SLICE_2033 ROUTE 9 1.902 R16C29A.F0 to R17C28C.B1 bin_to_bcd_lf/bcd_code_24__N_418 CTOF_DEL --- 0.495 R17C28C.B1 to R17C28C.F1 bin_to_bcd_lf/SLICE_2013 ROUTE 5 1.405 R17C28C.F1 to R18C26D.D0 bin_to_bcd_lf/bcd_code_24__N_413 CTOF_DEL --- 0.495 R18C26D.D0 to R18C26D.F0 bin_to_bcd_lf/SLICE_2355 ROUTE 5 1.841 R18C26D.F0 to R17C24B.D1 bin_to_bcd_lf/n88369 CTOF_DEL --- 0.495 R17C24B.D1 to R17C24B.F1 bin_to_bcd_lf/SLICE_2097 ROUTE 3 0.453 R17C24B.F1 to R17C24B.C0 bin_to_bcd_lf/n88358 CTOF_DEL --- 0.495 R17C24B.C0 to R17C24B.F0 bin_to_bcd_lf/SLICE_2097 ROUTE 4 1.000 R17C24B.F0 to R17C25B.A1 bin_to_bcd_lf/n88333 CTOF_DEL --- 0.495 R17C25B.A1 to R17C25B.F1 bin_to_bcd_lf/SLICE_2084 ROUTE 3 1.040 R17C25B.F1 to R17C24C.B1 bin_to_bcd_lf/n88320 CTOF_DEL --- 0.495 R17C24C.B1 to R17C24C.F1 bin_to_bcd_lf/SLICE_2003 ROUTE 10 1.905 R17C24C.F1 to R16C25A.A1 bin_to_bcd_lf/bcd_code_24__N_474 CTOF_DEL --- 0.495 R16C25A.A1 to R16C25A.F1 bin_to_bcd_lf/SLICE_2088 ROUTE 5 1.361 R16C25A.F1 to R15C24B.B0 bin_to_bcd_lf/n88231 CTOF_DEL --- 0.495 R15C24B.B0 to R15C24B.F0 bin_to_bcd_lf/SLICE_1634 ROUTE 2 1.010 R15C24B.F0 to R15C23C.B0 bin_to_bcd_lf/n88212 CTOF_DEL --- 0.495 R15C23C.B0 to R15C23C.F0 bin_to_bcd_lf/SLICE_1636 ROUTE 9 1.574 R15C23C.F0 to R16C25B.C0 bin_to_bcd_lf/bcd_code_24__N_501 CTOF_DEL --- 0.495 R16C25B.C0 to R16C25B.F0 bin_to_bcd_lf/SLICE_2082 ROUTE 3 0.758 R16C25B.F0 to R15C25B.C1 bin_to_bcd_lf/n88166 CTOF_DEL --- 0.495 R15C25B.C1 to R15C25B.F1 bin_to_bcd_lf/SLICE_2050 ROUTE 10 1.839 R15C25B.F1 to R16C26D.B0 bin_to_bcd_lf/bcd_code_24__N_543 CTOF_DEL --- 0.495 R16C26D.B0 to R16C26D.F0 bin_to_bcd_lf/SLICE_2058 ROUTE 2 0.993 R16C26D.F0 to R17C26B.A0 bin_to_bcd_lf/n88109 CTOF_DEL --- 0.495 R17C26B.A0 to R17C26B.F0 bin_to_bcd_lf/SLICE_2063 ROUTE 5 2.352 R17C26B.F0 to R13C25D.D0 bin_to_bcd_lf/n88094 CTOF_DEL --- 0.495 R13C25D.D0 to R13C25D.F0 bin_to_bcd_lf/SLICE_2020 ROUTE 4 0.995 R13C25D.F0 to R12C25C.A1 bin_to_bcd_lf/n88036 CTOF_DEL --- 0.495 R12C25C.A1 to R12C25C.F1 bin_to_bcd_lf/SLICE_2085 ROUTE 2 0.995 R12C25C.F1 to R14C25A.A1 bin_to_bcd_lf/n88023 CTOF_DEL --- 0.495 R14C25A.A1 to R14C25A.F1 bin_to_bcd_lf/SLICE_2032 ROUTE 10 1.958 R14C25A.F1 to R9C25C.D1 bin_to_bcd_lf/bcd_code_24__N_634 CTOF_DEL --- 0.495 R9C25C.D1 to R9C25C.F1 bin_to_bcd_lf/SLICE_2053 ROUTE 3 1.542 R9C25C.F1 to R12C25C.A0 bin_to_bcd_lf/n87987 CTOF_DEL --- 0.495 R12C25C.A0 to R12C25C.F0 bin_to_bcd_lf/SLICE_2085 ROUTE 9 2.420 R12C25C.F0 to R9C25B.A0 bin_to_bcd_lf/bcd_code_24__N_685 CTOF_DEL --- 0.495 R9C25B.A0 to R9C25B.F0 bin_to_bcd_lf/SLICE_1622 ROUTE 3 1.028 R9C25B.F0 to R8C25B.B0 bin_to_bcd_lf/n87958 CTOF_DEL --- 0.495 R8C25B.B0 to R8C25B.F0 bin_to_bcd_lf/SLICE_2054 ROUTE 10 1.472 R8C25B.F0 to R10C24D.A1 bin_to_bcd_lf/bcd_code_24__N_736 CTOF_DEL --- 0.495 R10C24D.A1 to R10C24D.F1 bin_to_bcd_lf/SLICE_2036 ROUTE 2 1.534 R10C24D.F1 to R12C26B.A1 bin_to_bcd_lf/n87938 CTOF_DEL --- 0.495 R12C26B.A1 to R12C26B.F1 bin_to_bcd_lf/SLICE_2025 ROUTE 7 2.191 R12C26B.F1 to R8C24B.C1 bin_to_bcd_lf/n87934 CTOF_DEL --- 0.495 R8C24B.C1 to R8C24B.F1 bin_to_bcd_lf/SLICE_2113 ROUTE 1 1.450 R8C24B.F1 to R9C22A.B1 bcd_code_16 CTOOFX_DEL --- 0.721 R9C22A.B1 to R9C22A.OFX0 OLED12832_lf/i37_adj_422/SLICE_1200 ROUTE 1 2.713 R9C22A.OFX0 to R15C19D.A1 OLED12832_lf/n17_adj_3361 CTOF_DEL --- 0.495 R15C19D.A1 to R15C19D.F1 SLICE_1529 ROUTE 1 0.436 R15C19D.F1 to R15C19D.C0 OLED12832_lf/char_167_N_1296_32 CTOF_DEL --- 0.495 R15C19D.C0 to R15C19D.F0 SLICE_1529 ROUTE 1 0.766 R15C19D.F0 to R13C19D.C1 OLED12832_lf/n16_adj_3358 CTOF_DEL --- 0.495 R13C19D.C1 to R13C19D.F1 OLED12832_lf/SLICE_296 ROUTE 1 0.000 R13C19D.F1 to R13C19D.DI1 OLED12832_lf/char_167_N_915_32 (to clk_c) -------- 84.317 (29.1% logic, 70.9% route), 46 logic levels. Clock Skew Details: Source Clock Path clk to SLICE_984: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R3C10D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Destination Clock Path clk to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R13C19D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Passed: The following path meets requirements by 40.520ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q DS18B20Z_lf/data_out_i0_i11 (from clk_c +) Destination: FF Data in OLED12832_lf/char_i32 (to clk_c +) Delay: 84.314ns (29.0% logic, 71.0% route), 49 logic levels. Constraint Details: 84.314ns physical path delay SLICE_985 to OLED12832_lf/SLICE_296 meets 125.000ns delay constraint less 0.000ns skew and 0.166ns DIN_SET requirement (totaling 124.834ns) by 40.520ns Physical Path Details: Data path SLICE_985 to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.452 R7C6D.CLK to R7C6D.Q1 SLICE_985 (from clk_c) ROUTE 1 2.180 R7C6D.Q1 to R13C17D.D0 data_out_11 CTOF_DEL --- 0.495 R13C17D.D0 to R13C17D.F0 SLICE_1684 ROUTE 8 2.967 R13C17D.F0 to R13C29C.A1 n8_adj_3562 CTOF_DEL --- 0.495 R13C29C.A1 to R13C29C.F1 SLICE_1650 ROUTE 38 0.750 R13C29C.F1 to R13C29D.B1 n88625 CTOF_DEL --- 0.495 R13C29D.B1 to R13C29D.F1 SLICE_2321 ROUTE 2 1.810 R13C29D.F1 to R13C30A.A1 temperature_code_4 C1TOFCO_DE --- 0.889 R13C30A.A1 to R13C30A.FCO SLICE_15 ROUTE 1 0.000 R13C30A.FCO to R13C30B.FCI n80348 FCITOFCO_D --- 0.162 R13C30B.FCI to R13C30B.FCO SLICE_14 ROUTE 1 0.000 R13C30B.FCO to R13C30C.FCI n80349 FCITOF0_DE --- 0.585 R13C30C.FCI to R13C30C.F0 SLICE_13 ROUTE 1 1.838 R13C30C.F0 to R15C30B.B1 n23041 C1TOFCO_DE --- 0.889 R15C30B.B1 to R15C30B.FCO SLICE_6 ROUTE 1 0.000 R15C30B.FCO to R15C30C.FCI n80355 FCITOFCO_D --- 0.162 R15C30C.FCI to R15C30C.FCO SLICE_5 ROUTE 1 0.000 R15C30C.FCO to R15C30D.FCI n80356 FCITOFCO_D --- 0.162 R15C30D.FCI to R15C30D.FCO SLICE_4 ROUTE 1 0.000 R15C30D.FCO to R15C31A.FCI n80357 FCITOF0_DE --- 0.585 R15C31A.FCI to R15C31A.F0 SLICE_3 ROUTE 1 1.962 R15C31A.F0 to R16C30C.B0 n23132 C0TOFCO_DE --- 1.023 R16C30C.B0 to R16C30C.FCO SLICE_20 ROUTE 1 0.000 R16C30C.FCO to R16C30D.FCI n80344 FCITOFCO_D --- 0.162 R16C30D.FCI to R16C30D.FCO SLICE_19 ROUTE 1 0.000 R16C30D.FCO to R16C31A.FCI n80345 FCITOFCO_D --- 0.162 R16C31A.FCI to R16C31A.FCO SLICE_18 ROUTE 1 0.000 R16C31A.FCO to R16C31B.FCI n80346 FCITOF1_DE --- 0.643 R16C31B.FCI to R16C31B.F1 SLICE_17 ROUTE 10 1.910 R16C31B.F1 to R17C30A.B0 bin_code_19 CTOF_DEL --- 0.495 R17C30A.B0 to R17C30A.F0 bin_to_bcd_lf/SLICE_2024 ROUTE 8 1.016 R17C30A.F0 to R17C30C.A1 bin_to_bcd_lf/bcd_code_24__N_355 CTOF_DEL --- 0.495 R17C30C.A1 to R17C30C.F1 bin_to_bcd_lf/SLICE_1431 ROUTE 5 1.459 R17C30C.F1 to R17C29A.B1 bin_to_bcd_lf/n90728 CTOF_DEL --- 0.495 R17C29A.B1 to R17C29A.F1 bin_to_bcd_lf/SLICE_2045 ROUTE 10 1.901 R17C29A.F1 to R16C29A.B1 bin_to_bcd_lf/bcd_code_24__N_373 CTOF_DEL --- 0.495 R16C29A.B1 to R16C29A.F1 bin_to_bcd_lf/SLICE_2033 ROUTE 3 1.359 R16C29A.F1 to R17C28A.B1 bin_to_bcd_lf/n88461 CTOF_DEL --- 0.495 R17C28A.B1 to R17C28A.F1 bin_to_bcd_lf/SLICE_2018 ROUTE 10 1.367 R17C28A.F1 to R16C29B.A0 bin_to_bcd_lf/bcd_code_24__N_391 CTOF_DEL --- 0.495 R16C29B.A0 to R16C29B.F0 bin_to_bcd_lf/SLICE_1617 ROUTE 3 0.445 R16C29B.F0 to R16C29A.C0 bin_to_bcd_lf/n88437 CTOF_DEL --- 0.495 R16C29A.C0 to R16C29A.F0 bin_to_bcd_lf/SLICE_2033 ROUTE 9 1.902 R16C29A.F0 to R17C28C.B1 bin_to_bcd_lf/bcd_code_24__N_418 CTOF_DEL --- 0.495 R17C28C.B1 to R17C28C.F1 bin_to_bcd_lf/SLICE_2013 ROUTE 5 1.405 R17C28C.F1 to R18C26D.D0 bin_to_bcd_lf/bcd_code_24__N_413 CTOF_DEL --- 0.495 R18C26D.D0 to R18C26D.F0 bin_to_bcd_lf/SLICE_2355 ROUTE 5 1.841 R18C26D.F0 to R17C24B.D1 bin_to_bcd_lf/n88369 CTOF_DEL --- 0.495 R17C24B.D1 to R17C24B.F1 bin_to_bcd_lf/SLICE_2097 ROUTE 3 0.453 R17C24B.F1 to R17C24B.C0 bin_to_bcd_lf/n88358 CTOF_DEL --- 0.495 R17C24B.C0 to R17C24B.F0 bin_to_bcd_lf/SLICE_2097 ROUTE 4 1.000 R17C24B.F0 to R17C25B.A1 bin_to_bcd_lf/n88333 CTOF_DEL --- 0.495 R17C25B.A1 to R17C25B.F1 bin_to_bcd_lf/SLICE_2084 ROUTE 3 1.040 R17C25B.F1 to R17C24C.B1 bin_to_bcd_lf/n88320 CTOF_DEL --- 0.495 R17C24C.B1 to R17C24C.F1 bin_to_bcd_lf/SLICE_2003 ROUTE 10 1.905 R17C24C.F1 to R16C25A.A1 bin_to_bcd_lf/bcd_code_24__N_474 CTOF_DEL --- 0.495 R16C25A.A1 to R16C25A.F1 bin_to_bcd_lf/SLICE_2088 ROUTE 5 1.361 R16C25A.F1 to R15C24B.B0 bin_to_bcd_lf/n88231 CTOF_DEL --- 0.495 R15C24B.B0 to R15C24B.F0 bin_to_bcd_lf/SLICE_1634 ROUTE 2 1.010 R15C24B.F0 to R15C23C.B0 bin_to_bcd_lf/n88212 CTOF_DEL --- 0.495 R15C23C.B0 to R15C23C.F0 bin_to_bcd_lf/SLICE_1636 ROUTE 9 1.574 R15C23C.F0 to R16C25B.C0 bin_to_bcd_lf/bcd_code_24__N_501 CTOF_DEL --- 0.495 R16C25B.C0 to R16C25B.F0 bin_to_bcd_lf/SLICE_2082 ROUTE 3 0.758 R16C25B.F0 to R15C25B.C1 bin_to_bcd_lf/n88166 CTOF_DEL --- 0.495 R15C25B.C1 to R15C25B.F1 bin_to_bcd_lf/SLICE_2050 ROUTE 10 1.839 R15C25B.F1 to R16C26D.B0 bin_to_bcd_lf/bcd_code_24__N_543 CTOF_DEL --- 0.495 R16C26D.B0 to R16C26D.F0 bin_to_bcd_lf/SLICE_2058 ROUTE 2 0.993 R16C26D.F0 to R17C26B.A0 bin_to_bcd_lf/n88109 CTOF_DEL --- 0.495 R17C26B.A0 to R17C26B.F0 bin_to_bcd_lf/SLICE_2063 ROUTE 5 2.352 R17C26B.F0 to R13C25D.D0 bin_to_bcd_lf/n88094 CTOF_DEL --- 0.495 R13C25D.D0 to R13C25D.F0 bin_to_bcd_lf/SLICE_2020 ROUTE 4 0.995 R13C25D.F0 to R12C25C.A1 bin_to_bcd_lf/n88036 CTOF_DEL --- 0.495 R12C25C.A1 to R12C25C.F1 bin_to_bcd_lf/SLICE_2085 ROUTE 2 0.995 R12C25C.F1 to R14C25A.A1 bin_to_bcd_lf/n88023 CTOF_DEL --- 0.495 R14C25A.A1 to R14C25A.F1 bin_to_bcd_lf/SLICE_2032 ROUTE 10 1.958 R14C25A.F1 to R9C25C.D1 bin_to_bcd_lf/bcd_code_24__N_634 CTOF_DEL --- 0.495 R9C25C.D1 to R9C25C.F1 bin_to_bcd_lf/SLICE_2053 ROUTE 3 1.542 R9C25C.F1 to R12C25C.A0 bin_to_bcd_lf/n87987 CTOF_DEL --- 0.495 R12C25C.A0 to R12C25C.F0 bin_to_bcd_lf/SLICE_2085 ROUTE 9 2.420 R12C25C.F0 to R9C25B.A0 bin_to_bcd_lf/bcd_code_24__N_685 CTOF_DEL --- 0.495 R9C25B.A0 to R9C25B.F0 bin_to_bcd_lf/SLICE_1622 ROUTE 3 1.028 R9C25B.F0 to R8C25B.B0 bin_to_bcd_lf/n87958 CTOF_DEL --- 0.495 R8C25B.B0 to R8C25B.F0 bin_to_bcd_lf/SLICE_2054 ROUTE 10 1.472 R8C25B.F0 to R10C24D.A1 bin_to_bcd_lf/bcd_code_24__N_736 CTOF_DEL --- 0.495 R10C24D.A1 to R10C24D.F1 bin_to_bcd_lf/SLICE_2036 ROUTE 2 1.534 R10C24D.F1 to R12C26B.A1 bin_to_bcd_lf/n87938 CTOF_DEL --- 0.495 R12C26B.A1 to R12C26B.F1 bin_to_bcd_lf/SLICE_2025 ROUTE 7 2.191 R12C26B.F1 to R8C24B.C1 bin_to_bcd_lf/n87934 CTOF_DEL --- 0.495 R8C24B.C1 to R8C24B.F1 bin_to_bcd_lf/SLICE_2113 ROUTE 1 1.450 R8C24B.F1 to R9C22A.B1 bcd_code_16 CTOOFX_DEL --- 0.721 R9C22A.B1 to R9C22A.OFX0 OLED12832_lf/i37_adj_422/SLICE_1200 ROUTE 1 2.713 R9C22A.OFX0 to R15C19D.A1 OLED12832_lf/n17_adj_3361 CTOF_DEL --- 0.495 R15C19D.A1 to R15C19D.F1 SLICE_1529 ROUTE 1 0.436 R15C19D.F1 to R15C19D.C0 OLED12832_lf/char_167_N_1296_32 CTOF_DEL --- 0.495 R15C19D.C0 to R15C19D.F0 SLICE_1529 ROUTE 1 0.766 R15C19D.F0 to R13C19D.C1 OLED12832_lf/n16_adj_3358 CTOF_DEL --- 0.495 R13C19D.C1 to R13C19D.F1 OLED12832_lf/SLICE_296 ROUTE 1 0.000 R13C19D.F1 to R13C19D.DI1 OLED12832_lf/char_167_N_915_32 (to clk_c) -------- 84.314 (29.0% logic, 71.0% route), 49 logic levels. Clock Skew Details: Source Clock Path clk to SLICE_985: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R7C6D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Destination Clock Path clk to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R13C19D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Passed: The following path meets requirements by 40.534ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q DS18B20Z_lf/data_out_i0_i8 (from clk_c +) Destination: FF Data in OLED12832_lf/char_i32 (to clk_c +) Delay: 84.300ns (29.1% logic, 70.9% route), 46 logic levels. Constraint Details: 84.300ns physical path delay SLICE_984 to OLED12832_lf/SLICE_296 meets 125.000ns delay constraint less 0.000ns skew and 0.166ns DIN_SET requirement (totaling 124.834ns) by 40.534ns Physical Path Details: Data path SLICE_984 to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.452 R3C10D.CLK to R3C10D.Q0 SLICE_984 (from clk_c) ROUTE 5 4.490 R3C10D.Q0 to R12C31A.B1 data_out_8 C1TOFCO_DE --- 0.889 R12C31A.B1 to R12C31A.FCO SLICE_37 ROUTE 1 0.000 R12C31A.FCO to R12C31B.FCI n80262 FCITOF0_DE --- 0.585 R12C31B.FCI to R12C31B.F0 SLICE_12 ROUTE 4 1.896 R12C31B.F0 to R13C29C.B0 temperature_code_10_N_12_9 CTOF_DEL --- 0.495 R13C29C.B0 to R13C29C.F0 SLICE_1650 ROUTE 2 1.846 R13C29C.F0 to R13C30D.B0 temperature_code_9 C0TOFCO_DE --- 1.023 R13C30D.B0 to R13C30D.FCO SLICE_11 ROUTE 1 0.000 R13C30D.FCO to R13C31A.FCI n80351 FCITOFCO_D --- 0.162 R13C31A.FCI to R13C31A.FCO SLICE_10 ROUTE 1 0.000 R13C31A.FCO to R13C31B.FCI n80352 FCITOFCO_D --- 0.162 R13C31B.FCI to R13C31B.FCO SLICE_9 ROUTE 1 0.000 R13C31B.FCO to R13C31C.FCI n80353 FCITOF0_DE --- 0.585 R13C31C.FCI to R13C31C.F0 SLICE_8 ROUTE 1 1.726 R13C31C.F0 to R15C31B.A1 n23049 C1TOFCO_DE --- 0.889 R15C31B.A1 to R15C31B.FCO SLICE_2 ROUTE 1 0.000 R15C31B.FCO to R15C31C.FCI n80359 FCITOF0_DE --- 0.585 R15C31C.FCI to R15C31C.F0 SLICE_1 ROUTE 1 1.420 R15C31C.F0 to R16C31A.B0 n23128 C0TOFCO_DE --- 1.023 R16C31A.B0 to R16C31A.FCO SLICE_18 ROUTE 1 0.000 R16C31A.FCO to R16C31B.FCI n80346 FCITOF1_DE --- 0.643 R16C31B.FCI to R16C31B.F1 SLICE_17 ROUTE 10 1.910 R16C31B.F1 to R17C30A.B0 bin_code_19 CTOF_DEL --- 0.495 R17C30A.B0 to R17C30A.F0 bin_to_bcd_lf/SLICE_2024 ROUTE 8 1.016 R17C30A.F0 to R17C30C.A1 bin_to_bcd_lf/bcd_code_24__N_355 CTOF_DEL --- 0.495 R17C30C.A1 to R17C30C.F1 bin_to_bcd_lf/SLICE_1431 ROUTE 5 1.459 R17C30C.F1 to R17C29A.B1 bin_to_bcd_lf/n90728 CTOF_DEL --- 0.495 R17C29A.B1 to R17C29A.F1 bin_to_bcd_lf/SLICE_2045 ROUTE 10 1.901 R17C29A.F1 to R16C29A.B1 bin_to_bcd_lf/bcd_code_24__N_373 CTOF_DEL --- 0.495 R16C29A.B1 to R16C29A.F1 bin_to_bcd_lf/SLICE_2033 ROUTE 3 1.359 R16C29A.F1 to R17C28A.B1 bin_to_bcd_lf/n88461 CTOF_DEL --- 0.495 R17C28A.B1 to R17C28A.F1 bin_to_bcd_lf/SLICE_2018 ROUTE 10 1.367 R17C28A.F1 to R16C29B.A0 bin_to_bcd_lf/bcd_code_24__N_391 CTOF_DEL --- 0.495 R16C29B.A0 to R16C29B.F0 bin_to_bcd_lf/SLICE_1617 ROUTE 3 0.445 R16C29B.F0 to R16C29A.C0 bin_to_bcd_lf/n88437 CTOF_DEL --- 0.495 R16C29A.C0 to R16C29A.F0 bin_to_bcd_lf/SLICE_2033 ROUTE 9 1.902 R16C29A.F0 to R17C28C.B1 bin_to_bcd_lf/bcd_code_24__N_418 CTOF_DEL --- 0.495 R17C28C.B1 to R17C28C.F1 bin_to_bcd_lf/SLICE_2013 ROUTE 5 1.405 R17C28C.F1 to R18C26D.D0 bin_to_bcd_lf/bcd_code_24__N_413 CTOF_DEL --- 0.495 R18C26D.D0 to R18C26D.F0 bin_to_bcd_lf/SLICE_2355 ROUTE 5 1.841 R18C26D.F0 to R17C24B.D1 bin_to_bcd_lf/n88369 CTOF_DEL --- 0.495 R17C24B.D1 to R17C24B.F1 bin_to_bcd_lf/SLICE_2097 ROUTE 3 0.640 R17C24B.F1 to R17C25D.D1 bin_to_bcd_lf/n88358 CTOF_DEL --- 0.495 R17C25D.D1 to R17C25D.F1 bin_to_bcd_lf/SLICE_2002 ROUTE 9 0.796 R17C25D.F1 to R17C25B.C1 bin_to_bcd_lf/bcd_code_24__N_436 CTOF_DEL --- 0.495 R17C25B.C1 to R17C25B.F1 bin_to_bcd_lf/SLICE_2084 ROUTE 3 1.040 R17C25B.F1 to R17C24C.B1 bin_to_bcd_lf/n88320 CTOF_DEL --- 0.495 R17C24C.B1 to R17C24C.F1 bin_to_bcd_lf/SLICE_2003 ROUTE 10 1.905 R17C24C.F1 to R16C25A.A1 bin_to_bcd_lf/bcd_code_24__N_474 CTOF_DEL --- 0.495 R16C25A.A1 to R16C25A.F1 bin_to_bcd_lf/SLICE_2088 ROUTE 5 1.361 R16C25A.F1 to R15C24B.B0 bin_to_bcd_lf/n88231 CTOF_DEL --- 0.495 R15C24B.B0 to R15C24B.F0 bin_to_bcd_lf/SLICE_1634 ROUTE 2 1.010 R15C24B.F0 to R15C23C.B0 bin_to_bcd_lf/n88212 CTOF_DEL --- 0.495 R15C23C.B0 to R15C23C.F0 bin_to_bcd_lf/SLICE_1636 ROUTE 9 1.574 R15C23C.F0 to R16C25B.C0 bin_to_bcd_lf/bcd_code_24__N_501 CTOF_DEL --- 0.495 R16C25B.C0 to R16C25B.F0 bin_to_bcd_lf/SLICE_2082 ROUTE 3 0.758 R16C25B.F0 to R15C25B.C1 bin_to_bcd_lf/n88166 CTOF_DEL --- 0.495 R15C25B.C1 to R15C25B.F1 bin_to_bcd_lf/SLICE_2050 ROUTE 10 1.839 R15C25B.F1 to R16C26D.B0 bin_to_bcd_lf/bcd_code_24__N_543 CTOF_DEL --- 0.495 R16C26D.B0 to R16C26D.F0 bin_to_bcd_lf/SLICE_2058 ROUTE 2 0.993 R16C26D.F0 to R17C26B.A0 bin_to_bcd_lf/n88109 CTOF_DEL --- 0.495 R17C26B.A0 to R17C26B.F0 bin_to_bcd_lf/SLICE_2063 ROUTE 5 2.352 R17C26B.F0 to R13C25D.D0 bin_to_bcd_lf/n88094 CTOF_DEL --- 0.495 R13C25D.D0 to R13C25D.F0 bin_to_bcd_lf/SLICE_2020 ROUTE 4 0.995 R13C25D.F0 to R12C25C.A1 bin_to_bcd_lf/n88036 CTOF_DEL --- 0.495 R12C25C.A1 to R12C25C.F1 bin_to_bcd_lf/SLICE_2085 ROUTE 2 0.995 R12C25C.F1 to R14C25A.A1 bin_to_bcd_lf/n88023 CTOF_DEL --- 0.495 R14C25A.A1 to R14C25A.F1 bin_to_bcd_lf/SLICE_2032 ROUTE 10 1.958 R14C25A.F1 to R9C25C.D1 bin_to_bcd_lf/bcd_code_24__N_634 CTOF_DEL --- 0.495 R9C25C.D1 to R9C25C.F1 bin_to_bcd_lf/SLICE_2053 ROUTE 3 1.542 R9C25C.F1 to R12C25C.A0 bin_to_bcd_lf/n87987 CTOF_DEL --- 0.495 R12C25C.A0 to R12C25C.F0 bin_to_bcd_lf/SLICE_2085 ROUTE 9 2.420 R12C25C.F0 to R9C25B.A0 bin_to_bcd_lf/bcd_code_24__N_685 CTOF_DEL --- 0.495 R9C25B.A0 to R9C25B.F0 bin_to_bcd_lf/SLICE_1622 ROUTE 3 1.028 R9C25B.F0 to R8C25B.B0 bin_to_bcd_lf/n87958 CTOF_DEL --- 0.495 R8C25B.B0 to R8C25B.F0 bin_to_bcd_lf/SLICE_2054 ROUTE 10 1.472 R8C25B.F0 to R10C24D.A1 bin_to_bcd_lf/bcd_code_24__N_736 CTOF_DEL --- 0.495 R10C24D.A1 to R10C24D.F1 bin_to_bcd_lf/SLICE_2036 ROUTE 2 1.534 R10C24D.F1 to R12C26B.A1 bin_to_bcd_lf/n87938 CTOF_DEL --- 0.495 R12C26B.A1 to R12C26B.F1 bin_to_bcd_lf/SLICE_2025 ROUTE 7 2.191 R12C26B.F1 to R8C24B.C1 bin_to_bcd_lf/n87934 CTOF_DEL --- 0.495 R8C24B.C1 to R8C24B.F1 bin_to_bcd_lf/SLICE_2113 ROUTE 1 1.450 R8C24B.F1 to R9C22A.B1 bcd_code_16 CTOOFX_DEL --- 0.721 R9C22A.B1 to R9C22A.OFX0 OLED12832_lf/i37_adj_422/SLICE_1200 ROUTE 1 2.713 R9C22A.OFX0 to R15C19D.A1 OLED12832_lf/n17_adj_3361 CTOF_DEL --- 0.495 R15C19D.A1 to R15C19D.F1 SLICE_1529 ROUTE 1 0.436 R15C19D.F1 to R15C19D.C0 OLED12832_lf/char_167_N_1296_32 CTOF_DEL --- 0.495 R15C19D.C0 to R15C19D.F0 SLICE_1529 ROUTE 1 0.766 R15C19D.F0 to R13C19D.C1 OLED12832_lf/n16_adj_3358 CTOF_DEL --- 0.495 R13C19D.C1 to R13C19D.F1 OLED12832_lf/SLICE_296 ROUTE 1 0.000 R13C19D.F1 to R13C19D.DI1 OLED12832_lf/char_167_N_915_32 (to clk_c) -------- 84.300 (29.1% logic, 70.9% route), 46 logic levels. Clock Skew Details: Source Clock Path clk to SLICE_984: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R3C10D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Destination Clock Path clk to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R13C19D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Passed: The following path meets requirements by 40.537ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q DS18B20Z_lf/data_out_i0_i11 (from clk_c +) Destination: FF Data in OLED12832_lf/char_i32 (to clk_c +) Delay: 84.297ns (29.0% logic, 71.0% route), 49 logic levels. Constraint Details: 84.297ns physical path delay SLICE_985 to OLED12832_lf/SLICE_296 meets 125.000ns delay constraint less 0.000ns skew and 0.166ns DIN_SET requirement (totaling 124.834ns) by 40.537ns Physical Path Details: Data path SLICE_985 to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.452 R7C6D.CLK to R7C6D.Q1 SLICE_985 (from clk_c) ROUTE 1 2.180 R7C6D.Q1 to R13C17D.D0 data_out_11 CTOF_DEL --- 0.495 R13C17D.D0 to R13C17D.F0 SLICE_1684 ROUTE 8 2.967 R13C17D.F0 to R13C29C.A1 n8_adj_3562 CTOF_DEL --- 0.495 R13C29C.A1 to R13C29C.F1 SLICE_1650 ROUTE 38 0.750 R13C29C.F1 to R13C29D.B1 n88625 CTOF_DEL --- 0.495 R13C29D.B1 to R13C29D.F1 SLICE_2321 ROUTE 2 1.810 R13C29D.F1 to R13C30A.A1 temperature_code_4 C1TOFCO_DE --- 0.889 R13C30A.A1 to R13C30A.FCO SLICE_15 ROUTE 1 0.000 R13C30A.FCO to R13C30B.FCI n80348 FCITOFCO_D --- 0.162 R13C30B.FCI to R13C30B.FCO SLICE_14 ROUTE 1 0.000 R13C30B.FCO to R13C30C.FCI n80349 FCITOF0_DE --- 0.585 R13C30C.FCI to R13C30C.F0 SLICE_13 ROUTE 1 1.838 R13C30C.F0 to R15C30B.B1 n23041 C1TOFCO_DE --- 0.889 R15C30B.B1 to R15C30B.FCO SLICE_6 ROUTE 1 0.000 R15C30B.FCO to R15C30C.FCI n80355 FCITOFCO_D --- 0.162 R15C30C.FCI to R15C30C.FCO SLICE_5 ROUTE 1 0.000 R15C30C.FCO to R15C30D.FCI n80356 FCITOFCO_D --- 0.162 R15C30D.FCI to R15C30D.FCO SLICE_4 ROUTE 1 0.000 R15C30D.FCO to R15C31A.FCI n80357 FCITOF0_DE --- 0.585 R15C31A.FCI to R15C31A.F0 SLICE_3 ROUTE 1 1.962 R15C31A.F0 to R16C30C.B0 n23132 C0TOFCO_DE --- 1.023 R16C30C.B0 to R16C30C.FCO SLICE_20 ROUTE 1 0.000 R16C30C.FCO to R16C30D.FCI n80344 FCITOFCO_D --- 0.162 R16C30D.FCI to R16C30D.FCO SLICE_19 ROUTE 1 0.000 R16C30D.FCO to R16C31A.FCI n80345 FCITOFCO_D --- 0.162 R16C31A.FCI to R16C31A.FCO SLICE_18 ROUTE 1 0.000 R16C31A.FCO to R16C31B.FCI n80346 FCITOF1_DE --- 0.643 R16C31B.FCI to R16C31B.F1 SLICE_17 ROUTE 10 1.910 R16C31B.F1 to R17C30A.B0 bin_code_19 CTOF_DEL --- 0.495 R17C30A.B0 to R17C30A.F0 bin_to_bcd_lf/SLICE_2024 ROUTE 8 1.016 R17C30A.F0 to R17C30C.A1 bin_to_bcd_lf/bcd_code_24__N_355 CTOF_DEL --- 0.495 R17C30C.A1 to R17C30C.F1 bin_to_bcd_lf/SLICE_1431 ROUTE 5 1.459 R17C30C.F1 to R17C29A.B1 bin_to_bcd_lf/n90728 CTOF_DEL --- 0.495 R17C29A.B1 to R17C29A.F1 bin_to_bcd_lf/SLICE_2045 ROUTE 10 1.901 R17C29A.F1 to R16C29A.B1 bin_to_bcd_lf/bcd_code_24__N_373 CTOF_DEL --- 0.495 R16C29A.B1 to R16C29A.F1 bin_to_bcd_lf/SLICE_2033 ROUTE 3 1.359 R16C29A.F1 to R17C28A.B1 bin_to_bcd_lf/n88461 CTOF_DEL --- 0.495 R17C28A.B1 to R17C28A.F1 bin_to_bcd_lf/SLICE_2018 ROUTE 10 1.367 R17C28A.F1 to R16C29B.A0 bin_to_bcd_lf/bcd_code_24__N_391 CTOF_DEL --- 0.495 R16C29B.A0 to R16C29B.F0 bin_to_bcd_lf/SLICE_1617 ROUTE 3 0.445 R16C29B.F0 to R16C29A.C0 bin_to_bcd_lf/n88437 CTOF_DEL --- 0.495 R16C29A.C0 to R16C29A.F0 bin_to_bcd_lf/SLICE_2033 ROUTE 9 1.902 R16C29A.F0 to R17C28C.B1 bin_to_bcd_lf/bcd_code_24__N_418 CTOF_DEL --- 0.495 R17C28C.B1 to R17C28C.F1 bin_to_bcd_lf/SLICE_2013 ROUTE 5 1.405 R17C28C.F1 to R18C26D.D0 bin_to_bcd_lf/bcd_code_24__N_413 CTOF_DEL --- 0.495 R18C26D.D0 to R18C26D.F0 bin_to_bcd_lf/SLICE_2355 ROUTE 5 1.841 R18C26D.F0 to R17C24B.D1 bin_to_bcd_lf/n88369 CTOF_DEL --- 0.495 R17C24B.D1 to R17C24B.F1 bin_to_bcd_lf/SLICE_2097 ROUTE 3 0.640 R17C24B.F1 to R17C25D.D1 bin_to_bcd_lf/n88358 CTOF_DEL --- 0.495 R17C25D.D1 to R17C25D.F1 bin_to_bcd_lf/SLICE_2002 ROUTE 9 0.796 R17C25D.F1 to R17C25B.C1 bin_to_bcd_lf/bcd_code_24__N_436 CTOF_DEL --- 0.495 R17C25B.C1 to R17C25B.F1 bin_to_bcd_lf/SLICE_2084 ROUTE 3 1.040 R17C25B.F1 to R17C24C.B1 bin_to_bcd_lf/n88320 CTOF_DEL --- 0.495 R17C24C.B1 to R17C24C.F1 bin_to_bcd_lf/SLICE_2003 ROUTE 10 1.905 R17C24C.F1 to R16C25A.A1 bin_to_bcd_lf/bcd_code_24__N_474 CTOF_DEL --- 0.495 R16C25A.A1 to R16C25A.F1 bin_to_bcd_lf/SLICE_2088 ROUTE 5 1.361 R16C25A.F1 to R15C24B.B0 bin_to_bcd_lf/n88231 CTOF_DEL --- 0.495 R15C24B.B0 to R15C24B.F0 bin_to_bcd_lf/SLICE_1634 ROUTE 2 1.010 R15C24B.F0 to R15C23C.B0 bin_to_bcd_lf/n88212 CTOF_DEL --- 0.495 R15C23C.B0 to R15C23C.F0 bin_to_bcd_lf/SLICE_1636 ROUTE 9 1.574 R15C23C.F0 to R16C25B.C0 bin_to_bcd_lf/bcd_code_24__N_501 CTOF_DEL --- 0.495 R16C25B.C0 to R16C25B.F0 bin_to_bcd_lf/SLICE_2082 ROUTE 3 0.758 R16C25B.F0 to R15C25B.C1 bin_to_bcd_lf/n88166 CTOF_DEL --- 0.495 R15C25B.C1 to R15C25B.F1 bin_to_bcd_lf/SLICE_2050 ROUTE 10 1.839 R15C25B.F1 to R16C26D.B0 bin_to_bcd_lf/bcd_code_24__N_543 CTOF_DEL --- 0.495 R16C26D.B0 to R16C26D.F0 bin_to_bcd_lf/SLICE_2058 ROUTE 2 0.993 R16C26D.F0 to R17C26B.A0 bin_to_bcd_lf/n88109 CTOF_DEL --- 0.495 R17C26B.A0 to R17C26B.F0 bin_to_bcd_lf/SLICE_2063 ROUTE 5 2.352 R17C26B.F0 to R13C25D.D0 bin_to_bcd_lf/n88094 CTOF_DEL --- 0.495 R13C25D.D0 to R13C25D.F0 bin_to_bcd_lf/SLICE_2020 ROUTE 4 0.995 R13C25D.F0 to R12C25C.A1 bin_to_bcd_lf/n88036 CTOF_DEL --- 0.495 R12C25C.A1 to R12C25C.F1 bin_to_bcd_lf/SLICE_2085 ROUTE 2 0.995 R12C25C.F1 to R14C25A.A1 bin_to_bcd_lf/n88023 CTOF_DEL --- 0.495 R14C25A.A1 to R14C25A.F1 bin_to_bcd_lf/SLICE_2032 ROUTE 10 1.958 R14C25A.F1 to R9C25C.D1 bin_to_bcd_lf/bcd_code_24__N_634 CTOF_DEL --- 0.495 R9C25C.D1 to R9C25C.F1 bin_to_bcd_lf/SLICE_2053 ROUTE 3 1.542 R9C25C.F1 to R12C25C.A0 bin_to_bcd_lf/n87987 CTOF_DEL --- 0.495 R12C25C.A0 to R12C25C.F0 bin_to_bcd_lf/SLICE_2085 ROUTE 9 2.420 R12C25C.F0 to R9C25B.A0 bin_to_bcd_lf/bcd_code_24__N_685 CTOF_DEL --- 0.495 R9C25B.A0 to R9C25B.F0 bin_to_bcd_lf/SLICE_1622 ROUTE 3 1.028 R9C25B.F0 to R8C25B.B0 bin_to_bcd_lf/n87958 CTOF_DEL --- 0.495 R8C25B.B0 to R8C25B.F0 bin_to_bcd_lf/SLICE_2054 ROUTE 10 1.472 R8C25B.F0 to R10C24D.A1 bin_to_bcd_lf/bcd_code_24__N_736 CTOF_DEL --- 0.495 R10C24D.A1 to R10C24D.F1 bin_to_bcd_lf/SLICE_2036 ROUTE 2 1.534 R10C24D.F1 to R12C26B.A1 bin_to_bcd_lf/n87938 CTOF_DEL --- 0.495 R12C26B.A1 to R12C26B.F1 bin_to_bcd_lf/SLICE_2025 ROUTE 7 2.191 R12C26B.F1 to R8C24B.C1 bin_to_bcd_lf/n87934 CTOF_DEL --- 0.495 R8C24B.C1 to R8C24B.F1 bin_to_bcd_lf/SLICE_2113 ROUTE 1 1.450 R8C24B.F1 to R9C22A.B1 bcd_code_16 CTOOFX_DEL --- 0.721 R9C22A.B1 to R9C22A.OFX0 OLED12832_lf/i37_adj_422/SLICE_1200 ROUTE 1 2.713 R9C22A.OFX0 to R15C19D.A1 OLED12832_lf/n17_adj_3361 CTOF_DEL --- 0.495 R15C19D.A1 to R15C19D.F1 SLICE_1529 ROUTE 1 0.436 R15C19D.F1 to R15C19D.C0 OLED12832_lf/char_167_N_1296_32 CTOF_DEL --- 0.495 R15C19D.C0 to R15C19D.F0 SLICE_1529 ROUTE 1 0.766 R15C19D.F0 to R13C19D.C1 OLED12832_lf/n16_adj_3358 CTOF_DEL --- 0.495 R13C19D.C1 to R13C19D.F1 OLED12832_lf/SLICE_296 ROUTE 1 0.000 R13C19D.F1 to R13C19D.DI1 OLED12832_lf/char_167_N_915_32 (to clk_c) -------- 84.297 (29.0% logic, 71.0% route), 49 logic levels. Clock Skew Details: Source Clock Path clk to SLICE_985: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R7C6D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Destination Clock Path clk to OLED12832_lf/SLICE_296: Name Fanout Delay (ns) Site Resource ROUTE 779 3.044 C1.PADDI to R13C19D.CLK clk_c -------- 3.044 (0.0% logic, 100.0% route), 0 logic levels. Report: 11.821MHz is the maximum frequency for this preference. Report Summary -------------- ---------------------------------------------------------------------------- Preference | Constraint| Actual|Levels ---------------------------------------------------------------------------- | | | FREQUENCY 8.000000 MHz ; | 8.000 MHz| 11.821 MHz| 46 | | | ---------------------------------------------------------------------------- All preferences were met. Clock Domains Analysis ------------------------ Found 6 clocks: Clock Domain: uart_en Source: clock_lf/SLICE_1020.Q0 Loads: 13 Covered under: FREQUENCY 8.000000 MHz ; Data transfers from: Clock Domain: clk_c Source: clk.PAD Covered under: FREQUENCY 8.000000 MHz ; Transfers: 16 Clock Domain: clk_o Source: clk_uart_lf/SLICE_654.Q0 Loads: 7 Covered under: FREQUENCY 8.000000 MHz ; Data transfers from: Clock Domain: uart_en Source: clock_lf/SLICE_1020.Q0 Covered under: FREQUENCY 8.000000 MHz ; Transfers: 17 Clock Domain: clk_c Source: clk.PAD Loads: 779 Covered under: FREQUENCY 8.000000 MHz ; Data transfers from: Clock Domain: uart_en Source: clock_lf/SLICE_1020.Q0 Covered under: FREQUENCY 8.000000 MHz ; Transfers: 2 Clock Domain: clk_o Source: clk_uart_lf/SLICE_654.Q0 Covered under: FREQUENCY 8.000000 MHz ; Transfers: 1 Clock Domain: B1_c Source: SLICE_235.Q0 Covered under: FREQUENCY 8.000000 MHz ; Transfers: 1 Clock Domain: clk_1ms Source: clk_1ms_lf/SLICE_653.Q0 Loads: 7 No transfer within this clock domain is found Data transfers from: Clock Domain: clk_c Source: clk.PAD Covered under: FREQUENCY 8.000000 MHz ; Transfers: 47 Clock Domain: DS18B20Z_lf/clk_1mhz Source: DS18B20Z_lf/SLICE_237.Q0 Loads: 10 No transfer within this clock domain is found Data transfers from: Clock Domain: clk_c Source: clk.PAD Covered under: FREQUENCY 8.000000 MHz ; Transfers: 21 Clock Domain: B1_c Source: SLICE_235.Q0 Loads: 16 No transfer within this clock domain is found Data transfers from: Clock Domain: clk_c Source: clk.PAD Covered under: FREQUENCY 8.000000 MHz ; Transfers: 8 Timing summary (Setup): --------------- Timing errors: 0 Score: 0 Cumulative negative slack: 0 Constraints cover 2147483647 paths, 6 nets, and 15794 connections (99.03% coverage) -------------------------------------------------------------------------------- Lattice TRACE Report - Hold, Version Diamond (64-bit) 3.11.0.396.4 Tue Feb 23 11:27:10 2021 Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2019 Lattice Semiconductor Corporation, All rights reserved. Report Information ------------------ Command line: trce -v 10 -gt -sethld -sp 4 -sphld m -o lf_project_impl1.twr -gui -msgset C:/Users/17152/Desktop/lf_project - 1.0/promote.xml lf_project_impl1.ncd lf_project_impl1.prf Design file: lf_project_impl1.ncd Preference file: lf_project_impl1.prf Device,speed: LCMXO2-4000HC,m Report level: verbose report, limited to 10 items per preference -------------------------------------------------------------------------------- Preference Summary
  • FREQUENCY 8.000000 MHz (0 errors)
  • 4096 items scored, 0 timing errors detected. BLOCK ASYNCPATHS BLOCK RESETPATHS -------------------------------------------------------------------------------- Derating parameters ------------------- Voltage: 3.300 V ================================================================================ Preference: FREQUENCY 8.000000 MHz ; 4096 items scored, 0 timing errors detected. -------------------------------------------------------------------------------- Passed: The following path meets requirements by 0.048ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q buzzer_lf/num_i0_i4 (from clk_c +) Destination: FF Data in buzzer_lf/stop_77 (to B1_c +) Delay: 0.734ns (45.6% logic, 54.4% route), 3 logic levels. Constraint Details: 0.734ns physical path delay buzzer_lf/SLICE_635 to buzzer_lf/SLICE_988 meets -0.013ns DIN_HLD and 0.000ns delay constraint less -0.699ns skew requirement (totaling 0.686ns) by 0.048ns Physical Path Details: Data path buzzer_lf/SLICE_635 to buzzer_lf/SLICE_988: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.133 R13C6A.CLK to R13C6A.Q0 buzzer_lf/SLICE_635 (from clk_c) ROUTE 21 0.146 R13C6A.Q0 to R13C5B.D1 buzzer_lf/num_4 CTOF_DEL --- 0.101 R13C5B.D1 to R13C5B.F1 buzzer_lf/SLICE_1702 ROUTE 6 0.253 R13C5B.F1 to R14C6B.C0 buzzer_lf/n88601 CTOF_DEL --- 0.101 R14C6B.C0 to R14C6B.F0 buzzer_lf/SLICE_988 ROUTE 1 0.000 R14C6B.F0 to R14C6B.DI0 buzzer_lf/n88571 (to B1_c) -------- 0.734 (45.6% logic, 54.4% route), 3 logic levels. Clock Skew Details: Source Clock Path clk to buzzer_lf/SLICE_635: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R13C6A.CLK clk_c -------- 1.565 (28.7% logic, 71.3% route), 1 logic levels. Destination Clock Path clk to buzzer_lf/SLICE_988: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R12C15A.CLK clk_c REG_DEL --- 0.154 R12C15A.CLK to R12C15A.Q0 SLICE_235 ROUTE 16 0.545 R12C15A.Q0 to R14C6B.CLK B1_c -------- 2.264 (26.6% logic, 73.4% route), 2 logic levels. Passed: The following path meets requirements by 0.049ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q buzzer_lf/num_i0_i3 (from clk_c +) Destination: FF Data in buzzer_lf/stop_77 (to B1_c +) Delay: 0.735ns (45.6% logic, 54.4% route), 3 logic levels. Constraint Details: 0.735ns physical path delay buzzer_lf/SLICE_634 to buzzer_lf/SLICE_988 meets -0.013ns DIN_HLD and 0.000ns delay constraint less -0.699ns skew requirement (totaling 0.686ns) by 0.049ns Physical Path Details: Data path buzzer_lf/SLICE_634 to buzzer_lf/SLICE_988: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.133 R13C5A.CLK to R13C5A.Q0 buzzer_lf/SLICE_634 (from clk_c) ROUTE 7 0.147 R13C5A.Q0 to R13C5B.C1 buzzer_lf/num_3 CTOF_DEL --- 0.101 R13C5B.C1 to R13C5B.F1 buzzer_lf/SLICE_1702 ROUTE 6 0.253 R13C5B.F1 to R14C6B.C0 buzzer_lf/n88601 CTOF_DEL --- 0.101 R14C6B.C0 to R14C6B.F0 buzzer_lf/SLICE_988 ROUTE 1 0.000 R14C6B.F0 to R14C6B.DI0 buzzer_lf/n88571 (to B1_c) -------- 0.735 (45.6% logic, 54.4% route), 3 logic levels. Clock Skew Details: Source Clock Path clk to buzzer_lf/SLICE_634: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R13C5A.CLK clk_c -------- 1.565 (28.7% logic, 71.3% route), 1 logic levels. Destination Clock Path clk to buzzer_lf/SLICE_988: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R12C15A.CLK clk_c REG_DEL --- 0.154 R12C15A.CLK to R12C15A.Q0 SLICE_235 ROUTE 16 0.545 R12C15A.Q0 to R14C6B.CLK B1_c -------- 2.264 (26.6% logic, 73.4% route), 2 logic levels. Passed: The following path meets requirements by 0.063ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q clock_lf/min_out_i0_i8 (from clk_c +) Destination: FF Data in clock_lf/uart_en_72 (to clk_1ms +) Delay: 0.984ns (23.8% logic, 76.2% route), 2 logic levels. Constraint Details: 0.984ns physical path delay clock_lf/SLICE_997 to clock_lf/SLICE_1020 meets -0.013ns DIN_HLD and 0.000ns delay constraint less -0.934ns skew requirement (totaling 0.921ns) by 0.063ns Physical Path Details: Data path clock_lf/SLICE_997 to clock_lf/SLICE_1020: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.133 R14C7B.CLK to R14C7B.Q1 clock_lf/SLICE_997 (from clk_c) ROUTE 10 0.748 R14C7B.Q1 to R2C16D.B0 min_out_7 CTOF_DEL --- 0.101 R2C16D.B0 to R2C16D.F0 clock_lf/SLICE_1020 ROUTE 3 0.002 R2C16D.F0 to R2C16D.DI0 clock_lf/n88626 (to clk_1ms) -------- 0.984 (23.8% logic, 76.2% route), 2 logic levels. Clock Skew Details: Source Clock Path clk to clock_lf/SLICE_997: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R14C7B.CLK clk_c -------- 1.565 (28.7% logic, 71.3% route), 1 logic levels. Destination Clock Path clk to clock_lf/SLICE_1020: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R10C27C.CLK clk_c REG_DEL --- 0.154 R10C27C.CLK to R10C27C.Q0 clk_1ms_lf/SLICE_653 ROUTE 7 0.780 R10C27C.Q0 to R2C16D.CLK clk_1ms -------- 2.499 (24.1% logic, 75.9% route), 2 logic levels. Passed: The following path meets requirements by 0.116ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q DS18B20Z_lf/cnt_write_i0_i0 (from clk_c +) Destination: FF Data in DS18B20Z_lf/i107_128 (to DS18B20Z_lf/clk_1mhz +) Delay: 0.623ns (46.4% logic, 53.6% route), 2 logic levels. Constraint Details: 0.623ns physical path delay DS18B20Z_lf/SLICE_248 to DS18B20Z_lf/SLICE_265 meets -0.013ns DIN_HLD and 0.000ns delay constraint less -0.520ns skew requirement (totaling 0.507ns) by 0.116ns Physical Path Details: Data path DS18B20Z_lf/SLICE_248 to DS18B20Z_lf/SLICE_265: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.133 R17C4A.CLK to R17C4A.Q0 DS18B20Z_lf/SLICE_248 (from clk_c) ROUTE 30 0.334 R17C4A.Q0 to R18C6C.A0 DS18B20Z_lf/cnt_write_0 CTOOFX_DEL --- 0.156 R18C6C.A0 to R18C6C.OFX0 DS18B20Z_lf/SLICE_265 ROUTE 1 0.000 R18C6C.OFX0 to R18C6C.DI0 DS18B20Z_lf/one_wire_N_320 (to DS18B20Z_lf/clk_1mhz) -------- 0.623 (46.4% logic, 53.6% route), 2 logic levels. Clock Skew Details: Source Clock Path clk to DS18B20Z_lf/SLICE_248: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R17C4A.CLK clk_c -------- 1.565 (28.7% logic, 71.3% route), 1 logic levels. Destination Clock Path clk to DS18B20Z_lf/SLICE_265: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R19C6B.CLK clk_c REG_DEL --- 0.154 R19C6B.CLK to R19C6B.Q0 DS18B20Z_lf/SLICE_237 ROUTE 10 0.366 R19C6B.Q0 to R18C6C.CLK DS18B20Z_lf/clk_1mhz -------- 2.085 (28.9% logic, 71.1% route), 2 logic levels. Passed: The following path meets requirements by 0.117ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q buzzer_lf/num_i0_i0 (from clk_c +) Destination: FF Data in buzzer_lf/stop_77 (to B1_c +) Delay: 0.803ns (29.1% logic, 70.9% route), 2 logic levels. Constraint Details: 0.803ns physical path delay SLICE_1003 to buzzer_lf/SLICE_988 meets -0.013ns DIN_HLD and 0.000ns delay constraint less -0.699ns skew requirement (totaling 0.686ns) by 0.117ns Physical Path Details: Data path SLICE_1003 to buzzer_lf/SLICE_988: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.133 R12C5B.CLK to R12C5B.Q0 SLICE_1003 (from clk_c) ROUTE 175 0.569 R12C5B.Q0 to R14C6B.B0 num_0 CTOF_DEL --- 0.101 R14C6B.B0 to R14C6B.F0 buzzer_lf/SLICE_988 ROUTE 1 0.000 R14C6B.F0 to R14C6B.DI0 buzzer_lf/n88571 (to B1_c) -------- 0.803 (29.1% logic, 70.9% route), 2 logic levels. Clock Skew Details: Source Clock Path clk to SLICE_1003: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R12C5B.CLK clk_c -------- 1.565 (28.7% logic, 71.3% route), 1 logic levels. Destination Clock Path clk to buzzer_lf/SLICE_988: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R12C15A.CLK clk_c REG_DEL --- 0.154 R12C15A.CLK to R12C15A.Q0 SLICE_235 ROUTE 16 0.545 R12C15A.Q0 to R14C6B.CLK B1_c -------- 2.264 (26.6% logic, 73.4% route), 2 logic levels. Passed: The following path meets requirements by 0.121ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q buzzer_lf/state_i0_i0 (from clk_c +) Destination: FF Data in buzzer_lf/stop_77 (to B1_c +) Delay: 0.807ns (29.0% logic, 71.0% route), 2 logic levels. Constraint Details: 0.807ns physical path delay buzzer_lf/SLICE_1016 to buzzer_lf/SLICE_988 meets -0.013ns DIN_HLD and 0.000ns delay constraint less -0.699ns skew requirement (totaling 0.686ns) by 0.121ns Physical Path Details: Data path buzzer_lf/SLICE_1016 to buzzer_lf/SLICE_988: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.133 R17C19C.CLK to R17C19C.Q0 buzzer_lf/SLICE_1016 (from clk_c) ROUTE 14 0.573 R17C19C.Q0 to R14C6B.D0 state_0_adj_3525 CTOF_DEL --- 0.101 R14C6B.D0 to R14C6B.F0 buzzer_lf/SLICE_988 ROUTE 1 0.000 R14C6B.F0 to R14C6B.DI0 buzzer_lf/n88571 (to B1_c) -------- 0.807 (29.0% logic, 71.0% route), 2 logic levels. Clock Skew Details: Source Clock Path clk to buzzer_lf/SLICE_1016: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R17C19C.CLK clk_c -------- 1.565 (28.7% logic, 71.3% route), 1 logic levels. Destination Clock Path clk to buzzer_lf/SLICE_988: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R12C15A.CLK clk_c REG_DEL --- 0.154 R12C15A.CLK to R12C15A.Q0 SLICE_235 ROUTE 16 0.545 R12C15A.Q0 to R14C6B.CLK B1_c -------- 2.264 (26.6% logic, 73.4% route), 2 logic levels. Passed: The following path meets requirements by 0.135ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q buzzer_lf/num_i0_i5 (from clk_c +) Destination: FF Data in buzzer_lf/stop_77 (to B1_c +) Delay: 0.821ns (40.8% logic, 59.2% route), 3 logic levels. Constraint Details: 0.821ns physical path delay buzzer_lf/SLICE_636 to buzzer_lf/SLICE_988 meets -0.013ns DIN_HLD and 0.000ns delay constraint less -0.699ns skew requirement (totaling 0.686ns) by 0.135ns Physical Path Details: Data path buzzer_lf/SLICE_636 to buzzer_lf/SLICE_988: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.133 R13C5D.CLK to R13C5D.Q0 buzzer_lf/SLICE_636 (from clk_c) ROUTE 4 0.233 R13C5D.Q0 to R13C5B.B1 buzzer_lf/num_5 CTOF_DEL --- 0.101 R13C5B.B1 to R13C5B.F1 buzzer_lf/SLICE_1702 ROUTE 6 0.253 R13C5B.F1 to R14C6B.C0 buzzer_lf/n88601 CTOF_DEL --- 0.101 R14C6B.C0 to R14C6B.F0 buzzer_lf/SLICE_988 ROUTE 1 0.000 R14C6B.F0 to R14C6B.DI0 buzzer_lf/n88571 (to B1_c) -------- 0.821 (40.8% logic, 59.2% route), 3 logic levels. Clock Skew Details: Source Clock Path clk to buzzer_lf/SLICE_636: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R13C5D.CLK clk_c -------- 1.565 (28.7% logic, 71.3% route), 1 logic levels. Destination Clock Path clk to buzzer_lf/SLICE_988: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R12C15A.CLK clk_c REG_DEL --- 0.154 R12C15A.CLK to R12C15A.Q0 SLICE_235 ROUTE 16 0.545 R12C15A.Q0 to R14C6B.CLK B1_c -------- 2.264 (26.6% logic, 73.4% route), 2 logic levels. Passed: The following path meets requirements by 0.145ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q clock_lf/min_out_i0_i4 (from clk_c +) Destination: FF Data in clock_lf/uart_en_72 (to clk_1ms +) Delay: 1.066ns (31.4% logic, 68.6% route), 3 logic levels. Constraint Details: 1.066ns physical path delay clock_lf/SLICE_363 to clock_lf/SLICE_1020 meets -0.013ns DIN_HLD and 0.000ns delay constraint less -0.934ns skew requirement (totaling 0.921ns) by 0.145ns Physical Path Details: Data path clock_lf/SLICE_363 to clock_lf/SLICE_1020: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.133 R14C7C.CLK to R14C7C.Q1 clock_lf/SLICE_363 (from clk_c) ROUTE 13 0.673 R14C7C.Q1 to R2C16D.C1 bin_min_7 CTOF_DEL --- 0.101 R2C16D.C1 to R2C16D.F1 clock_lf/SLICE_1020 ROUTE 1 0.056 R2C16D.F1 to R2C16D.C0 clock_lf/n10 CTOF_DEL --- 0.101 R2C16D.C0 to R2C16D.F0 clock_lf/SLICE_1020 ROUTE 3 0.002 R2C16D.F0 to R2C16D.DI0 clock_lf/n88626 (to clk_1ms) -------- 1.066 (31.4% logic, 68.6% route), 3 logic levels. Clock Skew Details: Source Clock Path clk to clock_lf/SLICE_363: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R14C7C.CLK clk_c -------- 1.565 (28.7% logic, 71.3% route), 1 logic levels. Destination Clock Path clk to clock_lf/SLICE_1020: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R10C27C.CLK clk_c REG_DEL --- 0.154 R10C27C.CLK to R10C27C.Q0 clk_1ms_lf/SLICE_653 ROUTE 7 0.780 R10C27C.Q0 to R2C16D.CLK clk_1ms -------- 2.499 (24.1% logic, 75.9% route), 2 logic levels. Passed: The following path meets requirements by 0.154ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q buzzer_lf/state_i0_i1 (from clk_c +) Destination: FF Data in buzzer_lf/stop_77 (to B1_c +) Delay: 0.840ns (27.9% logic, 72.1% route), 2 logic levels. Constraint Details: 0.840ns physical path delay buzzer_lf/SLICE_1018 to buzzer_lf/SLICE_988 meets -0.013ns DIN_HLD and 0.000ns delay constraint less -0.699ns skew requirement (totaling 0.686ns) by 0.154ns Physical Path Details: Data path buzzer_lf/SLICE_1018 to buzzer_lf/SLICE_988: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.133 R14C6D.CLK to R14C6D.Q0 buzzer_lf/SLICE_1018 (from clk_c) ROUTE 16 0.606 R14C6D.Q0 to R14C6B.A0 state_1_adj_3524 CTOF_DEL --- 0.101 R14C6B.A0 to R14C6B.F0 buzzer_lf/SLICE_988 ROUTE 1 0.000 R14C6B.F0 to R14C6B.DI0 buzzer_lf/n88571 (to B1_c) -------- 0.840 (27.9% logic, 72.1% route), 2 logic levels. Clock Skew Details: Source Clock Path clk to buzzer_lf/SLICE_1018: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R14C6D.CLK clk_c -------- 1.565 (28.7% logic, 71.3% route), 1 logic levels. Destination Clock Path clk to buzzer_lf/SLICE_988: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R12C15A.CLK clk_c REG_DEL --- 0.154 R12C15A.CLK to R12C15A.Q0 SLICE_235 ROUTE 16 0.545 R12C15A.Q0 to R14C6B.CLK B1_c -------- 2.264 (26.6% logic, 73.4% route), 2 logic levels. Passed: The following path meets requirements by 0.208ns Logical Details: Cell type Pin type Cell/ASIC name (clock net +/-) Source: FF Q DS18B20Z_lf/state_i0_i1 (from clk_c +) Destination: FF Data in DS18B20Z_lf/i107_128 (to DS18B20Z_lf/clk_1mhz +) Delay: 0.715ns (46.0% logic, 54.0% route), 3 logic levels. Constraint Details: 0.715ns physical path delay DS18B20Z_lf/SLICE_266 to DS18B20Z_lf/SLICE_265 meets -0.013ns DIN_HLD and 0.000ns delay constraint less -0.520ns skew requirement (totaling 0.507ns) by 0.208ns Physical Path Details: Data path DS18B20Z_lf/SLICE_266 to DS18B20Z_lf/SLICE_265: Name Fanout Delay (ns) Site Resource REG_DEL --- 0.133 R19C6D.CLK to R19C6D.Q0 DS18B20Z_lf/SLICE_266 (from clk_c) ROUTE 42 0.232 R19C6D.Q0 to R18C6B.B1 DS18B20Z_lf/state_1 CTOF_DEL --- 0.101 R18C6B.B1 to R18C6B.F1 DS18B20Z_lf/SLICE_268 ROUTE 2 0.154 R18C6B.F1 to R18C6C.M0 DS18B20Z_lf/n85080 MTOOFX_DEL --- 0.095 R18C6C.M0 to R18C6C.OFX0 DS18B20Z_lf/SLICE_265 ROUTE 1 0.000 R18C6C.OFX0 to R18C6C.DI0 DS18B20Z_lf/one_wire_N_320 (to DS18B20Z_lf/clk_1mhz) -------- 0.715 (46.0% logic, 54.0% route), 3 logic levels. Clock Skew Details: Source Clock Path clk to DS18B20Z_lf/SLICE_266: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R19C6D.CLK clk_c -------- 1.565 (28.7% logic, 71.3% route), 1 logic levels. Destination Clock Path clk to DS18B20Z_lf/SLICE_265: Name Fanout Delay (ns) Site Resource PADI_DEL --- 0.449 C1.PAD to C1.PADDI clk ROUTE 779 1.116 C1.PADDI to R19C6B.CLK clk_c REG_DEL --- 0.154 R19C6B.CLK to R19C6B.Q0 DS18B20Z_lf/SLICE_237 ROUTE 10 0.366 R19C6B.Q0 to R18C6C.CLK DS18B20Z_lf/clk_1mhz -------- 2.085 (28.9% logic, 71.1% route), 2 logic levels. Report Summary -------------- ---------------------------------------------------------------------------- Preference(MIN Delays) | Constraint| Actual|Levels ---------------------------------------------------------------------------- | | | FREQUENCY 8.000000 MHz ; | -| -| 3 | | | ---------------------------------------------------------------------------- All preferences were met. Clock Domains Analysis ------------------------ Found 6 clocks: Clock Domain: uart_en Source: clock_lf/SLICE_1020.Q0 Loads: 13 Covered under: FREQUENCY 8.000000 MHz ; Data transfers from: Clock Domain: clk_c Source: clk.PAD Covered under: FREQUENCY 8.000000 MHz ; Transfers: 16 Clock Domain: clk_o Source: clk_uart_lf/SLICE_654.Q0 Loads: 7 Covered under: FREQUENCY 8.000000 MHz ; Data transfers from: Clock Domain: uart_en Source: clock_lf/SLICE_1020.Q0 Covered under: FREQUENCY 8.000000 MHz ; Transfers: 17 Clock Domain: clk_c Source: clk.PAD Loads: 779 Covered under: FREQUENCY 8.000000 MHz ; Data transfers from: Clock Domain: uart_en Source: clock_lf/SLICE_1020.Q0 Covered under: FREQUENCY 8.000000 MHz ; Transfers: 2 Clock Domain: clk_o Source: clk_uart_lf/SLICE_654.Q0 Covered under: FREQUENCY 8.000000 MHz ; Transfers: 1 Clock Domain: B1_c Source: SLICE_235.Q0 Covered under: FREQUENCY 8.000000 MHz ; Transfers: 1 Clock Domain: clk_1ms Source: clk_1ms_lf/SLICE_653.Q0 Loads: 7 No transfer within this clock domain is found Data transfers from: Clock Domain: clk_c Source: clk.PAD Covered under: FREQUENCY 8.000000 MHz ; Transfers: 47 Clock Domain: DS18B20Z_lf/clk_1mhz Source: DS18B20Z_lf/SLICE_237.Q0 Loads: 10 No transfer within this clock domain is found Data transfers from: Clock Domain: clk_c Source: clk.PAD Covered under: FREQUENCY 8.000000 MHz ; Transfers: 21 Clock Domain: B1_c Source: SLICE_235.Q0 Loads: 16 No transfer within this clock domain is found Data transfers from: Clock Domain: clk_c Source: clk.PAD Covered under: FREQUENCY 8.000000 MHz ; Transfers: 8 Timing summary (Hold): --------------- Timing errors: 0 Score: 0 Cumulative negative slack: 0 Constraints cover 2147483647 paths, 6 nets, and 15794 connections (99.03% coverage) Timing summary (Setup and Hold): --------------- Timing errors: 0 (setup), 0 (hold) Score: 0 (setup), 0 (hold) Cumulative negative slack: 0 (0+0) -------------------------------------------------------------------------------- --------------------------------------------------------------------------------