{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1611145339482 ""}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analyze Current File Quartus Prime " "Running Quartus Prime Analyze Current File" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition " "Version 19.1.0 Build 670 09/22/2019 SJ Lite Edition" {  } {  } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1611145339483 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Jan 20 20:22:19 2021 " "Processing started: Wed Jan 20 20:22:19 2021" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1611145339483 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Design Software" 0 -1 1611145339483 ""}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off pro_1 -c pro_1 --analyze_file=C:/Users/Dell/Desktop/FPGA_2020WINTER/project_2020winter/pro_1_19.1/tem_trans.v " "Command: quartus_map --read_settings_files=on --write_settings_files=off pro_1 -c pro_1 --analyze_file=C:/Users/Dell/Desktop/FPGA_2020WINTER/project_2020winter/pro_1_19.1/tem_trans.v" {  } {  } 0 0 "Command: %1!s!" 0 0 "Design Software" 0 -1 1611145339483 ""}
{ "Warning" "WQCU_PARALLEL_USER_SHOULD_SPECIFY_NUM_PROC" "" "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." {  } {  } 0 18236 "Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance." 0 0 "Design Software" 0 -1 1611145340816 ""}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "6 6 " "Parallel compilation is enabled and will use 6 of the 6 processors detected" {  } {  } 0 20030 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "Design Software" 0 -1 1611145340816 ""}
{ "Error" "EVRFX_VERI_SYNTAX_ERROR" "\"begin\";  expecting \"(\" tem_trans.v(11) " "Verilog HDL syntax error at tem_trans.v(11) near text: \"begin\";  expecting \"(\". Check for and fix any syntax errors that appear immediately before or at the specified keyword. The Intel FPGA Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number." {  } { { "tem_trans.v" "" { Text "C:/Users/Dell/Desktop/FPGA_2020WINTER/project_2020winter/pro_1_19.1/tem_trans.v" 11 0 0 } }  } 0 10170 "Verilog HDL syntax error at %2!s! near text: %1!s!. Check for and fix any syntax errors that appear immediately before or at the specified keyword. The Intel FPGA Knowledge Database contains many articles with specific details on how to resolve this error. Visit the Knowledge Database at https://www.altera.com/support/support-resources/knowledge-base/search.html and search for this specific error message number." 0 0 "Design Software" 0 -1 1611145349866 ""}
{ "Error" "EVRFX_VERI_DESIGN_UNIT_IGNORED" "tem_trans tem_trans.v(1) " "Ignored design unit \"tem_trans\" at tem_trans.v(1) due to previous errors" {  } { { "tem_trans.v" "" { Text "C:/Users/Dell/Desktop/FPGA_2020WINTER/project_2020winter/pro_1_19.1/tem_trans.v" 1 0 0 } }  } 0 10112 "Ignored design unit \"%1!s!\" at %2!s! due to previous errors" 0 0 "Design Software" 0 -1 1611145349866 ""}
{ "Error" "EQEXE_ERROR_COUNT" "Analyze Current File 2 s 1  Quartus Prime " "Quartus Prime Analyze Current File was unsuccessful. 2 errors, 1 warning" { { "Error" "EQEXE_END_PEAK_VSIZE_MEMORY" "4712 " "Peak virtual memory: 4712 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1611145349866 ""} { "Error" "EQEXE_END_BANNER_TIME" "Wed Jan 20 20:22:29 2021 " "Processing ended: Wed Jan 20 20:22:29 2021" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1611145349866 ""} { "Error" "EQEXE_ELAPSED_TIME" "00:00:10 " "Elapsed time: 00:00:10" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1611145349866 ""} { "Error" "EQEXE_ELAPSED_CPU_TIME" "00:00:19 " "Total CPU time (on all processors): 00:00:19" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1611145349866 ""}  } {  } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Design Software" 0 -1 1611145349866 ""}
